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Effect of Microstructure and Dielectric Materials on Stress-Induced Damages in Damascene Cu/Low-k Interconnects

Published online by Cambridge University Press:  01 February 2011

Young-Chang Joo
Affiliation:
School of Materials Science and Engineering, Seoul National University, Seoul 151-744 Korea
Jong-Min Paik
Affiliation:
School of Materials Science and Engineering, Seoul National University, Seoul 151-744 Korea
Jung-Kyu Jung
Affiliation:
School of Materials Science and Engineering, Seoul National University, Seoul 151-744 Korea
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Abstract

The line width dependence of stress in damascene Cu was examined experimentally as well as with a numerical simulation. The measured hydrostatic stress was found to increase with increasing line width. The larger stress in an interconnect with large dimension is attributed to the larger grain size, which induce higher growth stress in addition to thermomechanical stress. A stress model based on microstructure was constructed and the contribution of the growth and thermal stress of the damascene lines were quantified using finite element analysis. It was found that the stress of the via is lower than that of wide lines when both the growth stress and thermal stress were considered. This stress gradient between via and line, which is the driving force of vacancy diffusion, is larger when the low-k with lower stiffness and higher thermal expansion is used for dielectric layer. For this reason, the Cu/low-k can be more vulnerable to stress-induced voiding.

Type
Research Article
Copyright
Copyright © Materials Research Society 2005

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