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Development of A Silane Rich CVD Tungsten Process

  • Sanjay Tripathi (a1) and Farhad Moghadam (a1)

Abstract

The economics of manufacturing is driving the use of larger wafer sizes. At the same time smaller device geometries place more stringent requirements on film properties. Maintaining tight control of metal film properties in larger reactors presents unique challenges in the development of manufacturing worthy processes. This paper presents the development of a CVD tungsten process that was necessitated by the requirement for stable deposition uniformity with the conversion of wafer sizes from 6“ to 8”. The scaled up version of the 6“ process was rendered obsolete in the 8” tool due to unacceptable drifts in deposition uniformity.

Fluorine build up in the reaction chamber from the silane (SiH4) and hydrogen (H2) reduction of tungsten hexafloride (WF6) was identified to be the main cause for the process instability. We discuss how the problem was identified and how the new process was developed. Data on the uniformity of deposited films, collected over several hundred wafers with the old process and the new process show the new process to be superior. Device yield and electrical parameter data show the new process to be at least as good as the previous process.

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