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Degradation and SILC Effects of RPECVD sub-2.0nm Oxide/Nitride and Oxynitride Dielectrics Under Constant Current Stress

Published online by Cambridge University Press:  01 February 2011

Yi-Mu Lee
Affiliation:
Dept. of Electrical & Computer Engineering
Yider Wu
Affiliation:
One AMD Place, PO Box 3453, M/S 143, Sunnyvale, CA 94088-3453 Phone: (919)515-3301, Fax: (919)515-7331, Email: lucovsky@unity.ncsu.edu
Joon Goo Hong
Affiliation:
Materials Science & Engineering
Gerald Lucovsky
Affiliation:
Dept. of Electrical & Computer Engineering Materials Science & Engineering Physics, North Carolina State University, PO Box 8202, Raleigh, NC 27695
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Abstract

Constant current stress (CCS) has been used to investigate the Stress-Induced Leakage Current (SILC) to clarify the influence of boron penetration and nitrogen incorporation on the breakdown of p-channel devices with sub-2.0 nm Oxide/Nitride (O/N) and oxynitride dielectrics prepared by remote plasma enhanced CVD (RPECVD). Degradation of MOSFET characteristics correlated with soft breakdown (SBD) and hard breakdown (HBD), and attributed to the increased gate leakage current are studied. Gate voltages were gradually decreased during SBD, and a continuous increase in SILC at low gate voltages between each stress interval, is shown to be due to the generation of positive traps which are enhanced by boron penetration. Compared to thermal oxides, stacked O/N and oxynitride dielectrics with interface nitridation show reduced SILC due to the suppression of boron penetration and associated positive trap generation. Devices stressed under substrate injection show harder breakdown and more severe degradation, implying a greater amount of the stress-induced defects at SiO2/substrate interface. Stacked O/N and oxynitride devices also show less degradation in electrical performance compared to thermal oxide devices due to an improved Si/SiO2 interface, and reduced gate-to-drain overlap region.

Type
Research Article
Copyright
Copyright © Materials Research Society 2002

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