To determine the nature and effect of defects which occur in the growth of crystalline semiconductor films on amorphous substrates, one must carry out microstructural and electrical studies on the same material regions. In previous publications we have demonstrated that by controlling optical absorption in and around delineated silicon areas, the nucleation and growth processes can be controlled. In this way we have been able to produce single crystal islands >20 μm on a side. Using a simple, novel parylene lift –off technique we can now routinely study the material crystallized on bulk glass using transmission electron microscopy. We report here preliminary results of correlated electrical and structural studies on pre – patterned silicon films crystallized under various conditions. Electrical characterization consists mainly of I – V measurements on diodes and MOSFETS fabricated in the crystallized material by conventional silicon IC processing techniques. For microstructural characterization of the same devices we rely on TEM, EBIC and spatially– resolved Raman scattering.