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Application of Self-Aligned Amorphous SI Thin-Film Transistors

Published online by Cambridge University Press:  15 February 2011

J.P. Lu
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA
P. Mei
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA
C. Chua
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA
J. Ho
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA
Y. Wang
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA
J. B. Boyce
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA
R. Lujan
Affiliation:
Xerox dpiX, Palo Alto, CA
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Abstract

We have successfully used self-aligned Amorphous Si Thin-Film Transistors, fabricated by a laser doping/annealing process, to construct dynamic shift register circuits, which can be used as gate-line drivers or in other peripheral circuits for flat-panel displays and imagers. Taking advantage of easily scaling down the TFT channel length in a self-aligned process, much higher circuit speeds can be achieved compared to that of circuits using conventional TFTs. We have successfully demonstrated a four-phase dynamic shift register, operating at a clock speed higher that 250 kHz (1 μs for each clock phase) built on 3 μm channel length TFTs. This new technology opens up possibilities for integrating peripheral circuits in flat-panel displays and imagers based on a-Si TFTs.

Type
Research Article
Copyright
Copyright © Materials Research Society 1999

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References

1. Saitoh, A., Kim, C. D., Sakoda, T., and Matsumura, M., Thin Film Transistor Technologies III, Electrochemical Soc. Proc., PV 96–23, p123 (1997).Google Scholar
2. Nishida, S., Uchida, H., and Kaneko, S., MRS Symposium Proceedings., V219, p303, (1991).Google Scholar
3. Powell, M. J., Glasse, C., Curran, J. E., Hughes, J. R., French, I. D. and Martin, B. F., MRS Symposium Proceedings, 1998.Google Scholar
4. Mei, P., Anderson, G. B., Boyce, J. B., Fork, D. K., and Lujan, R., Thin Film Transistor Technologies III, Electrochemical Soc. Proc., PV 96–23, p51 (1997).Google Scholar
5. Steward, R., SID symposium digest, 89 (1995).Google Scholar
6. Shur, M. S., Slade, H. C., Ytterdal, T., Wang, L., Xu, Z., Hack, M., Aflatooni, K., Byun, Y., Chen, Y., Froggatt, M., Krishnan, A., Mei, P., Meiling, H., Min, B. H., Nathan, A., Sherman, S., Stewart, M., and Theiss, S., MRS Symposium Proceedings, V467, p831, 1997.Google Scholar
7. Weste, N. and Eshraghian, K., Principles of CMOS VLS Design (Addison-Wesley publishing company).Google Scholar
8.XMR Inc, Fremond, California.Google Scholar
9. Lu, J.P., Mei, P., Lujan, R. and Boyce, J. B., submitted to Thin Film Transistor Technologies IV, Electrochemical Soc. Proc. (1998).Google Scholar