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An Investigation on Interconnect Via Failure

  • Joe W. Zhao (a1), John Doherty (a1) and Bruce Whitefield (a1)


The formations of insulating material and voids at the interface between metal 1 and metal 2 in interconnect vias in Al-1%Si-0.25Cu% alloy has been investigated. A thin layer between metal 1 and 2 interface was identified using Transmission Electron Microscopy(TEM). The material was analyzed using TEM with Energy Dispersive X-ray spectroscopy(EDX) confirming that the insulating layer was Silicon. It is believed that the via failure was due to the formation of silicon precipitate at the interface and the coalescence of voids after High Temperature Storage(HTS) test for a long time period. The formation of Si precipitate and the growth of voids at the interface of aluminum alloy in interconnect via is dependent on the grain structure. The formation of voids at via interface is related to thermal treatment position in backend process. A change of thermal treatment position has been made, and no via failure has been found after HTS test for 2000 hours. A model is proposed for the mechanism of the via open failure.



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1. Kanazawa, M., Shishiao, M., Hata, Y. and Umemoto, T., in VMIC Conference, June 13, 1991, P221.
2. Shibata, H., Matsuno, T. and Hashimoto, K., in 30th IEEE Int. Reliability Physics Symposium, P340 (1989).
3. Albrecht, J., Bemstein, I.M., and Thompson, A.W., Metallurgical Transcations A, Vol. 13A, 1982, pp. 811820.
4. Tomioka, H., Tanabe, S. and Mizukami, Koichiro, in 30th IEEE Int. Reliability Physics Symposium, P53.
5. Saito, S., Takenaka, N., Ohnishi, S., Ayukawa, A., Miki, K. and Sakiyama, K., in VIMIC Conference, June 12, 1989, P432.


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