The standard Transmission Line Model (TLM) is an electrical network that is commonly used to model planar two-layer (metal-semiconductor) ohmic contacts. More complex multilayered planar structures have led to the development of more complex models. A Tri-Layer Transmission Line Model (TLTLM) was recently proposed in order to more accurately represent an alloyed ohmic contact. The TLTLM also enables other layered planar contact structures such as non-alloyed n+/n, heterojunction and metal-silicide-silicon contacts to be analysed. In this paper, it is shown that when the TLTLM is combined with a modified TLM network, important device properties such as contact and parasitic resistance can be derived for device structures using several epilayers such as FET's. An example is given of the current distribution in an FET and the calculation of the parasitic resistance in the gate-drain channel and the contact resistance of the drain.