Hostname: page-component-8448b6f56d-cfpbc Total loading time: 0 Render date: 2024-04-23T16:23:34.901Z Has data issue: false hasContentIssue false
  • English
  • Français

Alternating Layer Chemical Vapor Deposition (ALD) of Metal Silicates and Oxides for Gate Insulators

Published online by Cambridge University Press:  21 March 2011

Roy G. Gordon ,
Jill Becker ,
Dennis Hausmann  and
Seigi Suh
Roy G. Gordon
Affiliation:
Department of Chemistry and Chemical Biology, Harvard University, Cambridge, MA 02138
Jill Becker
Affiliation:
Department of Chemistry and Chemical Biology, Harvard University, Cambridge, MA 02138
Dennis Hausmann
Affiliation:
Department of Chemistry and Chemical Biology, Harvard University, Cambridge, MA 02138
Seigi Suh
Affiliation:
Department of Chemistry and Chemical Biology, Harvard University, Cambridge, MA 02138
Get access

Abstract

A new process was developed for deposition of the silicates and oxides of metals such as zirconium and hafnium at low substrate temperatures (100–300°C). The silicon and oxygen source is tris(tert-butoxy)silanol, (tBuO)3SiOH, and the metal precursors are metal amides. A typical reaction is

ZrL4 + 2 (tBuO)3SiOH → ZrSi2O6 + 4HL + 6H2C=C(CH3)2 + 2 H2O

in which the ligand L is ethylmethylamide, -NEtMe. The precursor vapors were alternately pulsed into a heated reactor, yielding about 0.3 to 0.7 nm of metal silicate film for each cycle. Replacing the silanol pulses with water pulses yields pure metal oxides with a thickness of about 0.1 to 0.15 nm per cycle. The silicon content of the films can be adjusted to any desired value by replacing some of the silanol pulses by water pulses. This new process has a number of advantages over previous methods for depositing metal silicates. Uniformity of thickness and stoichiometry are readily achieved. The deposition atmosphere is non-oxidizing, so that formation of low-k interfacial oxides between the deposited layer and a silicon substrate is minimized. The new halogen-free precursors avoid halogen contamination of films and corrosion of deposition systems. This process is a promising method for forming the next generation of ultra-thin high-k gate dielectrics in silicon-based microelectronics.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 670: Symposium K – Gate Stack and Sillicide Issues in Silicon , 2001 , K2.4
Copyright
Copyright © Materials Research Society 2001

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Ritala, M., Kukli, K., Rahtu, A., Raisanen, P. I., Leskela, M., Sajavaara, T. and Keinonen, J., Science 288, 319–321 (2000).Google Scholar
2.Aldrich and Gelest.Google Scholar
3. Bradley, D. C. and Thomas, I. M., J. Chem. Soc. 1960, 3857.Google Scholar
4. , Aldrich, Aesar, Alfa, Boulder Scientific, Heraeus and Strem Chemical.Google Scholar
5. Zazzera, L. A. and Moulder, J. F., J. Electrochem. Soc. 136, 484 (1989).Google Scholar
6. Hanninen, T., Mutikainen, I., Saanila, V., Ritala, M. and Leskela, M., Chem. Mat. 9, 1234–1240 (1997); T. Hatanpaa, J. Ihaus, J. Kansikas, I. Mutikainen, M. Ritala and M. Leskela, Chem. Mat. 11, 1846-1852 (1999).Google Scholar
7. Kingon, A. I., Maria, J-P. and Streiffer, S. K., Nature 406, 1021–1038 (2000).Google Scholar