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Tuneable CMOS and Current Mirror Circuit with Double-gate Screen Grid Field Effect Transistors

Published online by Cambridge University Press:  01 February 2011

Yasaman Shadrokh
Affiliation:
y.shadrokh@imperial.ac.uk, Imperial College, Electronic and Electrical Engineering, Level 1, Electronic and Electrical Engineering Building, South Kensington Campus, Imperial Colleeg, London, SW7 2AZ, United Kingdom
Kristel Fobelets
Affiliation:
k.fobelets@imperial.ac.uk, Imperial College London, Elec. Eng., Exhibition Road, London, SW7 2AZ, United Kingdom
Enrique Velazquez-Perez
Affiliation:
js@usal.es, Universidad de Salamanca, Departmento de Física Aplicada, Salamanca, Spain
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Abstract

The multiple-gate aspect of the Screen Grid Field Effect Transistor (SGrFET) increases functionality and reduces component count of circuits. An independently-driven gate SGrFET is used to control the switching voltage as well as the gain factor of an inverter. The multi-gate configuration of the SGrFET allows a decrease in output conductance without an increase of transistors count. This leads to a reduction in fabrication complexity, chip area and parasitics. In addition, a simple SGrFETs-based current mirror circuit is proposed with gain factor control.

Type
Research Article
Copyright
Copyright © Materials Research Society 2010

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References

[1] Fobelets, K. Ding, P. W. and Velazquez-Perez, J. E., “A novel 3D Gate Field Effect Transistor Screen-Grid FET Device-Concept and Modelling,” Solid State Electron, vol. 51 (5), pp. 749759, 2007.Google Scholar
[2] Shadrokh, Y. Fobelets, K. and Velazquez-Perez, J. E., “Comparison of the multi-gate functionality of screen-grid field effect transistors with finFETs,” Semicond. Sci. Technol vol. 23, pp. 9, 2008.Google Scholar
[3] “Taurus-Medici User Guide (Version W-2004.09), S.I., Mountain View, CA.Google Scholar
[4] Hodges, D. A. Jackson, H. G. and Saleh, R. A. Analysis and Design of Digital Integrated Circuits: In Deep Submicron Technology: McGraw-Hill Professional, 2004.Google Scholar
[5] Kaya, S. Hamed, H. F. A. and Starzyk, J. A.Low-Power Tunable Analog Circuit Blocks Based on Nanoscale Double-Gate MOSFETs,” IEEE Transactions on Circuit and Systems, vol. 54, pp. 571575, JULY 2007.Google Scholar
[6] Yuan, J. S. and Yang, L.Teaching Digital Noise and Noise Margin Issues in Engineering Education,” IEEE Transactions on Education, vol. 48, pp. 162168, 2005.Google Scholar
[7] Andreev, B. Titlebaum, E. L. and Friedman, E. G.Sizing CMOS Inverter with Miller Effect and Threshold voltage Variations,” World Science, vol. 15, pp. 437454, 2006.Google Scholar
[8] Masahara, M. Surdeanu, R. Witters, L. Doornbos, G. Nguyen, V. H. bosch, G. V. d. Vrancken, C., Devriendt, K. Neuilly, F. Kunnen, E. Jurczak, M. and Biesemans, S.Demonstration of Asymmetric Gate Oxide Thickness 4-Terminal FinFETs,” IEEE Electron Device Letters, vol. 28, pp. 217219, 2007.Google Scholar
[9] Shadrokh, Y. Fobelets, K. and Velazquez-Perez, J. E., “Optimizing the Screen-Grid Field Effect Transistor for high drive current and low Miller capacitance,” 2009 Spring MRS Conference, 2009.Google Scholar
[10] Hamed, H. F. A. Kaya, S. and Starzyk, J. A.Use of nano-scale double-gate MOSFETs in low-power tunable current mode analog circuits,” Analog Integrated Circuits and Signal Processing, vol. 54, pp. 211217, 2008.Google Scholar