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Polycrystalline Silicon-Germanium Electrode Contact Technology Improvement for MEMS Applications

Published online by Cambridge University Press:  31 January 2011

Gert Claes
Affiliation:
gert.claes@imec.be, IMEC, Leuven, Belgium
Simone Severi
Affiliation:
severis@imec.be, IMEC, Leuven, Belgium
Stefaan Decoutere
Affiliation:
decoutere@imec.be, IMEC, Leuven, Belgium
Jean-Pierre Celis
Affiliation:
Jean-pierre.celis@mtm.kuleuven.be, K.U.Leuven, MTM, Leuven, Belgium
Ann Witvrouw
Affiliation:
witvrouw@imec.be, IMEC, Leuven, Belgium
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Abstract

Poly-SiGe has quite some potential as structural MEMS layer for CMOS-MEMS integration. However, the contact resistance between SiGe MEMS and top CMOS metal should be low to avoid parasitic effects that would reduce the system performance. In this paper, a new and simple approach is proposed to achieve a low contact resistance between a top CMOS interconnect and a boron doped poly-SiGe MEMS layer deposited at 450 °C. The use of a 20 nm soft sputter etch in combination with a Ti-TiN (5-10 nm) interlayer results in a contact resistivity of 6.2 ± 0.4 × 10-7 Ωcm2 that is lower than previously reported. The uniformity of the contact resistivity across the wafer is also better than the state-of-the-art value.

Type
Research Article
Copyright
Copyright © Materials Research Society 2010

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References

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