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Modeling and Scaling of a-Si:H and Poly-Si Thin Film Transistors

Published online by Cambridge University Press:  15 February 2011


M. S. Shur
Affiliation:
Rensselaer Polytechnic Institute, ECSE Dept., Troy, NY 12180
H. C Slade
Affiliation:
Rensselaer Polytechnic Institute, ECSE Dept., Troy, NY 12180 University of Virginia, EE Dept., Thornton Hall, Charlottesville, VA 22903–2442
T. Ytterdal
Affiliation:
Rensselaer Polytechnic Institute, ECSE Dept., Troy, NY 12180
L. Wang
Affiliation:
Rensselaer Polytechnic Institute, ECSE Dept., Troy, NY 12180
Z. Xu
Affiliation:
Rensselaer Polytechnic Institute, ECSE Dept., Troy, NY 12180
M. Hack
Affiliation:
dpiX, A Xerox Company, 3406 HillView Ave., Palo Alto, CA 94304–3590
K. Aflatooni
Affiliation:
University of Waterloo, Amorphous Silicon Group, E&CE Dept., Waterloo, Ontario, Canada
Y. Byun
Affiliation:
Optical Imaging Systems, Inc., 47050 Five Mile Rd., Northville, MI 48167
Y Chen
Affiliation:
Amorphous Silicon Group, EE Dept., Princeton University, Princeton, NJ 08544
M. Froggatt
Affiliation:
Thin Film Laboratory, Eng. Dept., Cambridge University, Cambridge CB2 1PZ, U.K.
A. Krishnan
Affiliation:
Pennsylvania State University, Electronic Materials and Processing Research Laboratory, State College, PA 16802
P. Mei
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Rd., Palo Alto, CA 94304
H. Meiling
Affiliation:
Debye Institute, Utrecht University, P.O. Box 80.000, 3508 TA Utrecht, NL
B.-H. Min
Affiliation:
Center for Display Technology and Manufacturing, University of Michigan, 3300 Plymouth Rd., Ann Arbor, MI 48105
A. Nathan
Affiliation:
University of Waterloo, Amorphous Silicon Group, E&CE Dept., Waterloo, Ontario, Canada
S. Sherman
Affiliation:
Optical Imaging Systems, Inc., 47050 Five Mile Rd., Northville, MI 48167
M. Stewart
Affiliation:
Display Research Laboratory, Lehigh University, Bethlehem, PA 18015
S. Theiss
Affiliation:
Amorphous Silicon Group, EE Dept., Princeton University, Princeton, NJ 08544

Abstract

We have developed analytic SPICE models for hydrogenated amorphous silicon (a-Si:H) and polysilicon (poly-Si) thin film transistors (TFTs) which accurately model all regimes of operation, are temperature dependent to 150°C, and scale with device dimensions. These models have been presented in [1, 2]. In this work, we compare the current-voltage characteristics predicted by our models with the measured characteristics from TFTs fabricated at different foundries. We compare the extracted device parameters in order to evaluate the robustness of our models and to determine a suitable default parameter set. We also use the models to examine the effects of device scaling for short channel TFTs. The models can be accessed using the circuit simulator AIM-Spice [3], which is available at http://nina.ecse.rpi.edu/aimspice.


Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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References

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