Gettering by the dislocation network caused by P-diffusion into the back surface of Si wafers at 950° C for 1 hr. is often used for VLSI. However, transistors with sub-micron gates are jeopardized at 950°C because of possible source-drain punch through by lateral P-diffusion. The temperature dependence of gettering by P-diffusion has been investigated at 950, 900, and 850°C. Gettering by P-diffusion was found to be marginal at 900°C and totally ineffective at 850°C.

Recently published data on the solubility and diffusivity of interstitial oxygen in Czochralski-grown Si has been used to develop a simple out-diffusion model for denuded zone formation during thermal oxidation. Comparison with experimental observations on samples with high interstitial SiO2 concentration [Oi]0, exposed to dry oxidation at 1100° C for various times up to 8 hrs. and followed by 24 hr. anneals in N2 at 700°C and 1050°C, reveal that SiO2 precipitation occurs when the supersaturation ratio exceeds 4.7. The model implies an optimum denuding temperature near 100° C for a dry oxidation time of 4 hrs. The bulk defect density was also observed to decrease more than a factor of 5 as the denuding time was increased from 0 to 8 hrs.

Intrinsic gettering by SiO2 precipitates in Czochralski-grown silicon has been evaluated over a wide range of initial interstitial oxygen concentrations 15 < [Oi]0 < 22 ppma with and without a HI-LO-HI pre-process annealing cycle. Among samples of approximately 100 p-n junctions per wafer, reductions of 1–3 orders of magnitude in reverse leakage at 5 volts were achieved in the worst 10% of 500 μm square devices on wafers that were exposed to the HI-LO-HI heat treatment. Intrinsic gettering is most effective when [Oi]0 22 ppma, but leakage reduction among the worst diodes is achieved at the expense of a 2 or 3-fold increase in median leakage.