Hostname: page-component-84b7d79bbc-4hvwz Total loading time: 0 Render date: 2024-07-26T17:47:19.089Z Has data issue: false hasContentIssue false
  • English
  • Français

Facet Free Selective Silicon Epitaxy by Rapid Thermal Chemical Vapor Deposition

Published online by Cambridge University Press:  10 February 2011

Katherine E. Violette ,
Rick Wise ,
Chih-Ping Chao  and
Sreenath Unnikrishnan
Katherine E. Violette
Affiliation:
Texas Instruments Incorporated, Silicon Technology Development Center, 13570 N. Central Expressway, M/S 3701, Dallas, TX 75243
Rick Wise
Affiliation:
Texas Instruments Incorporated, Silicon Technology Development Center, 13570 N. Central Expressway, M/S 3701, Dallas, TX 75243
Chih-Ping Chao
Affiliation:
Texas Instruments Incorporated, Silicon Technology Development Center, 13570 N. Central Expressway, M/S 3701, Dallas, TX 75243
Sreenath Unnikrishnan
Affiliation:
Texas Instruments Incorporated, Silicon Technology Development Center, 13570 N. Central Expressway, M/S 3701, Dallas, TX 75243
Get access

Abstract

A facet-free, selective epitaxy process has been identified using the SiH2CI2 /HCI/H2 chemistry in a commercially available, single-wafer epitaxy reactor. The pre-epitaxy bake required a minimum of 900°C in order to obtain a clean silicon surface with reasonable throughput while preserving the integrity of the shallow trench isolation structures. The epitaxy growth rate ranged from as low as 130Å/rnin at 825°C, 10 torr to as high as 1500 Å/min at 875°C and 70 torr while the deposition rate of polysilicon on polysilicon differed significantly: at 10 torr, the epitaxy growth rate is greater by as much as 50%, and at 70 torr the polysilicon deposition rate is greater by as much as 40%. The facet suppression depended heavily on two things: the undercut beneath the polysilicon gate sidewall insulator and the process pressure. The undercut is believed to be responsible for suppressing the initial stage of facet formation, most probably by completely eliminating lateral overgrowth of the crystal. The process conditions then enable continued facet suppression perhaps by restricting the silicon surface mobility. The sidewall structure and process conditions combine to make a reliably facet-free selective epitaxy process

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 525: Symposium W – Rapid Thermal & Integrated Processing VII , 1998 , 289
Copyright
Copyright © Materials Research Society 1998

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Wong, S. S., Bradbury, D. R., Chen, D. C., and Chiu, K. Y., in International Electron Devices Meeting, 1984 (IEEE), p. 634–637.Google Scholar
2. Sanganeria, M. K., Violette, K. E., Öztürk, M. C., Harris, G., Lee, C. A., and Maher, D. M., Appl. Phys. Lett. 66, 1–3 (1995).Google Scholar
3. Borland, J. O. and Drowley, C. I.,, 141–148 (1985).Google Scholar
4. Sedgwick, T. O., Agnello, P. D., Berkenblit, M., and Kuan, T. S., J. Electrochem. Soc. 138, 3042–3046 (1991).Google Scholar
5. Fitch, J. T., J. Electrochem. Soc. 141, 1046–1055 (1994).Google Scholar
6. Yamazaki, T., Miyata, N., Aoyama, T., andIto, T.,J. Electrochem. Soc. 139, 1175–1180 (1992).Google Scholar
7. Bryant, A., Hansclh, W. and Mii, T., in International Electron Devices Meeting, 1994 (IEEE), p. 671–674.Google Scholar
8. Murtaza, S., Chatterjee, A., Mei, P., Amerasekera, A., Nicollian, P., Kittl, J., Breedijk, T., Hanratty, M., Nag, S., All, I., Rogers, D., and Chen, I.-C., in VLSI Symposium, 1997, p. 133–137.9Google Scholar
9. Borland, , in Proceedings of the 10th international conference on chemical vapor deposition, 1987 (Electrochemical Society, Pennington, NJ).Google Scholar
10. Tromp, R., Rubloff, G. W., Balk, P., LeGoues, F. K., and Loenen, E. J. c., Phys. Rev. Lett. 55, 2332–2335 (1985).Google Scholar
11. Tseng, H.-C., Chang, C.-Y., Pan, F.-M., and Chen, L.-P., J. Electrochem. Soc. 144, 2226–2230 (1997).Google Scholar
12. Rubloff, G. W., Hofmann, K., Leihr, M., and Young, D. R., Phys. Rev. Lett. 58, 2379–2382 (1987).Google Scholar
13. Osenbach, J. W., Schimmel, D. G., Feygenson, A., Bastek, J. J., Tsai, J. C. C., Praefcke, H. C., and Bonato, E. W., J. Mater. Res. 6, 2318–2323 (1991).Google Scholar
14. Drowley, C. I., Reid, G. A., and Hull, R., Appl. Phys. Lett. 52, 546–548 (1988).Google Scholar
15. Violette, K. E., O'Neil, P. A., Oztiirk, M. C., Christensen, K., and Maher, D. M., Appl. Phys. Lett. 68, 66–68 (1996).Google Scholar
16. Weldon, K., Dory, T., Jan, C. H., Landau, B., Stivers, A., and Bohr, M., in The Extended Abstracts of the 186th Meeting of the Electrochemical Society, Miami Beach, FL, 1994 (Electrochem. Society), p. 756–757-.Google Scholar
17. Caymax, M., Poortmans, J., VanAmmel, A., Libezny, M., Nijs, J., and Mertens, R., Thin Solid Films 241, 324–328 (1994).Google Scholar
18. Mogami, T., Wakabayashi, H., Saito, Y., Tatsumi, T., Matsuki, T., and Kunio, T., IEEE Trans. Electron Devices 43, 922–938 (1996).Google Scholar
19. Nayak, S., Savage, D. E., Chu, H.-C., Lagally, M. G., and Kuech, T. F., J. Crystal Growth 157, 168–171 (1995).Google Scholar
20. Saito, K., Amazawa, T., and Arita, Y., Japn. J. Appl. Phys. 29, L185–L187 (1990).Google Scholar
21. Tatsumi, T., Aketagawa, K., Hiroi, M., and Sakai, J., J. Cryst. Growth 120, 275–278 (1992).Google Scholar
22. Sanganeria, M. K., Oztiirk, M. C., Harris, G., Violette, K. E., Ban, I., Lee, C. A., and Maher, D. M., J. of Electrochem. Soc. 142, 3961 (1995).Google Scholar
23. Aoyama, T., Ikarashi, T., Miyanaga, K., and Tatsumi, T., J. Crystal Growth 136, 349–354 (1994).Google Scholar
24. Li, S., Xiang, Q., Wang, D., and Wang, K., J. Crystal Growth 157, 185–189 (1995).Google Scholar