Hostname: page-component-84b7d79bbc-g5fl4 Total loading time: 0 Render date: 2024-07-26T06:45:23.870Z Has data issue: false hasContentIssue false

Fabrication of Strained Silicon on Insulator (SSOI) by Direct Wafer Bonding Using Thin Relaxed SiGe Film as Virtual Substrate

Published online by Cambridge University Press:  17 March 2011

J.J. Lee
Affiliation:
Sharp Labs of America, 5700 NW Pacific Rim Blvd Camas, WA 98607, USA
J.S. Maa
Affiliation:
Sharp Labs of America, 5700 NW Pacific Rim Blvd Camas, WA 98607, USA
D. J. Tweet
Affiliation:
Sharp Labs of America, 5700 NW Pacific Rim Blvd Camas, WA 98607, USA
S.T. Hsu
Affiliation:
Sharp Labs of America, 5700 NW Pacific Rim Blvd Camas, WA 98607, USA
Get access

Abstract

NMOS devices have been successfully fabricated on SSOI wafers. The SSOI wafer fabrication is by direct wafer bonding and wafer transfer by splitting of the strained Si on thin SiGe virtual substrate to an oxidized wafer. The thin SiGe virtual substrate is fabricated by strained SiGe deposition, H2+ implantation, and SiGe lattice relaxation anneal. This relaxation process creates a confined defect zone at the SiGe to Si substrate interface that ensures low defect strained Si growth. 10 μm by 10 μm NMOS SSOI devices show an improvement of 100% in drive current and 115% in transconductance. A near ideal subthreshold swing was observed on NMOS devices with channel length as short as 0.1 μm.

Type
Research Article
Copyright
Copyright © Materials Research Society 2004

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

[1] Langdo, T.A., Lochtefeld, A., Currie, M.T., Hammond, R., Yang, V.K., Carlin, J.A., Vineis, C.J., Braithwaite, G., Badawi, H., Bulsara, M.T., and Fitzgerald, E.A., in Proc. IEEE Int. SOI Conf., Oct. 2002, pp. 211212.Google Scholar
[2] Rim, K., Chan, K., Shi, L., Boyd, D., Ott, J., Klymko, N., Cardone, F., Tai, L., Koester, S., Cobb, M., Canaperi, D., To, B., Duch, E., Babich, I., Carruthers, R., Saunders, P., Walker, G., Zhang, Y., Steen, M., and Ieong, M., in IEDM Tech. Dig., 2003, pp. 4952.Google Scholar
[3] Lauer, I., Langdo, T.A., Cheng, Z.Y., Fiorenza, J.G., Braithwaite, G., Currie, M.T., Leitz, C.W., Lochtefeld, A., Badawi, H., Bulsara, M.T., Somerville, M., and Antoniadis, D.A., IEEE Electron Device Lett., vol. 25, pp. 8385, Feb. 2004.Google Scholar
[4] Takagi, S., Mizuno, T., Tezuka, T., Sugiyama, N., Numata, T., Usuda, K., Moriyama, Y., Nakaharai, S., Koga, J., Tanabe, A., Hirashita, N., and Maeda, T., in IEDM Tech. Dig., 2003, pp.5760.Google Scholar
[5] Trinkaus, H., Hollander, B., Rongen, St., Mantl, S., Herzog, H.-J., Kuchenbecker, J., and Hackbarth, T., Appl. Phys. Lett., vol. 76, pp 35523554, 2000.Google Scholar
[6] Lee, J.J., Maa, J.S., Tweet, D. J., Hsu, S.T., Fujii, K., Baba, T., Ueda, T., Naka, T., and Awaya, N., “in Proc. 3rd ICSI3, Santa Fe, New Mexico, March 2003, pp. 135137.Google Scholar
[7] Maa, J.S., Tweet, D.J., Lee, J.J., Hsu, S.T., Fujii, K., Naka, T., Ueda, T., Baba, T., Awaya, N., and Sakiyama, K., MRS Proc. Vol. 765, pp. 135140, 2003.Google Scholar
[8] Bruel, M., Aspar, B., and Auberton-Herve, A.J., Jpn. J. Appl. Phys., vol. 36, no. 3B, pp. 16361641, 1997.Google Scholar
[9] People, R., IEEE J. Quantum Electron., vol 22, pp. 16961710, Sept, 1986.Google Scholar
[10] Yamada, T., Zhou, J.R., Miyata, H., and Ferry, D.K., IEEE Trans. Electron Devices, vol. 41, pp. 15131522, Sept, 1994.Google Scholar
[11] Rim, K., Hoyt, J.L., and Gibbons, J.F., IEEE Trans. Electron Devices, vol. 47, pp. 14061415, July, 2000.Google Scholar
[12] Goo, J.S., Xiang, Q., Takamura, Y., Wang, H., Pan, J., Arasnia, F., Paton, E.N., Besser, P., Sidorov, M.V., Adem, E., Lochtefeld, A., G.Braithwaite, Currie, M.T., Hammond, R., Bulsara, M.T., and Lin, M.R., IEEE Electron Device Lett., vol. 24, pp. 351353, May 2003.Google Scholar