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Fabrication of Si-Gate CMOS Devices In A Heteroepitaxial Si/Caf2/Si Structure

Published online by Cambridge University Press:  28 February 2011

Hiroshi Onoda
Affiliation:
VLSI Research & Development Center, OKI Electric Industry Co.,Ltd.Higashiasakawa, Hachioji, Tokyo 193, Japan
Masayoshi Sasaki
Affiliation:
VLSI Research & Development Center, OKI Electric Industry Co.,Ltd.Higashiasakawa, Hachioji, Tokyo 193, Japan
Teruo Katoh
Affiliation:
VLSI Research & Development Center, OKI Electric Industry Co.,Ltd.Higashiasakawa, Hachioji, Tokyo 193, Japan
Norio Hirashita
Affiliation:
VLSI Research & Development Center, OKI Electric Industry Co.,Ltd.Higashiasakawa, Hachioji, Tokyo 193, Japan
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Abstract

The results of recent developments on device fabrication in a heteroepitaxial Si/CaF2/Si structure have been presented and discussed. A high quality heteroepitaxial Si/CaF2/Si structure has been obtained by successive molecular beam epitaxy of CaF2 and Si. The epitaxial Si film on CaF2/Si structure has an ion channeling minimum yield of 7 %. It was found, however, that Ca and F segregated at the surface of epitaxial Si films. A possibility of reducing the segregation effect by the use of solid phase epitaxy of Si has been proposed.

Si-gate CMOS devices have been successfully fabricated in a Si/CaF2/Si structure with alt improved CMOS proress. The maximum effective mobiliiies are about 570 cm2/V.sec and 240 cm2/V.sec for n-channel and p-channel transistors, respectively. Propagation delays below 360 ps have been obtained for CMOS inverter chains with Leff = 2 μm. These results indicate that the Si/CaF2/Si structure has potential for the fabrication of high-speed silicon-on-insulator devices.

Type
Research Article
Copyright
Copyright © Materials Research Society 1987

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References

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