Hostname: page-component-7c8c6479df-27gpq Total loading time: 0 Render date: 2024-03-28T15:36:37.443Z Has data issue: false hasContentIssue false

Copper Metallization Technology for Deep Submicron ULSIs

Published online by Cambridge University Press:  29 November 2013

Get access

Extract

Investment in high-performance and large-scale integration (LSI) has been increasing and low-cost fabrication equipment, simple processing, and short turnaround are big concerns. The propagation delay time in a device is reduced with a reduction in device size, and wiring delay becomes longer than device delays. Wiring then has become as important as the device itself. Future multilevel wiring will require five to seven levels. The multilayer wiring itself will not be easy to achieve, because of increased wiring cost, process complexity, and longer turnaround. We must overcome these problems.

The materials required for wiring so that ULSI performance and reliability in RISC (reduced instruction set computer), and CISC (complex instruction set computer) type processors and DSPs (digital signal processors) can be increased must have a lower resistivity and higher resistance to electromigration (EM) and stress migration (SM) than do aluminum alloys. Gold, copper, and silver are candidate wiring materials. Copper is especially attractive, but we must overcome several obstacles to take advantage of its potential.

This article will discuss wring and via resistance delay, Cu CVD technology, the surface reaction mechanism, copper patterning technology, copper oxidation and diffusion prevention, and copper wiring reliability.

Type
Copper Metallization in Industry
Copyright
Copyright © Materials Research Society 1994

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1.Arita, Y., Awaya, N., Ohno, K., and Sato, M., Oyobutsuri 61 (1992) p. 1156.Google Scholar
2.Arita, Y., Awaya, N., Amazawa, T., and Saito, K., Int. Conf. Adv. Microelectronics Device Processing (Tohoku University, 1994) p. 85.Google Scholar
3.Usami, T., Shimokawa, K., and Yoshimaru, M., Semiconductor World (December 1993) p. 164.Google Scholar
4.Shin, H-K., Chi, K-M., Jain, A., Hampden-Smith, M.J., Kodas, T.T., Paffett, M.F., and Farr, J.D., in Advanced Metallization for ULSI Applications, edited by Rana, W.S., Joshi, R.V., and Ohdomari, I. (Materials Research Society, Pittsburgh, PA, 1992) p. 403.Google Scholar
5.Norman, J.A.T., Muratore, B.A., Dyer, P.N., Roberts, D.A., and Hochberg, A.K., Proc. 8th VLSI Multilevel Interconnection Conf. (IEEE, 1991) p. 123.Google Scholar
6.Saito, N., Uchida, H., Sato, M., Itsuki, A., and Ogi, K., Extended Abstracts (The 41st Spring Meeting, 1994) (Jpn. Soc. Appl. Phys. Related Societies, 30P-ZH-11) p. 736.Google Scholar
7.Baum, T.H. and Larson, C.E., J. Electrochem. Soc. 140 (1993) p. 154.CrossRefGoogle Scholar
8.Kang, H-K., Asano, I., and Wong, S.S., Technical Digest of IEDM (1992) p. 297.Google Scholar
9.Gross, M.E. and Donnelly, V.M., in Proc. Advanced Metallization for ULSI Applications, edited by Rana, W.S., Joshi, R.V, and Ohdomari, I. (Materials Research Society, Pittsburgh, PA, 1992) p. 355.Google Scholar
10.Awaya, N. and Arita, Y., Symp. VLSI Tech., Kyoto, Japan (1993) p. 125.Google Scholar
11.Gelatos, A.V., Poon, S., Marsh, R., Mogab, C.J., and Thompson, M., Symp. VLSI Tech., Kyoto, Japan (1993) p. 123.Google Scholar
12.Norman, J.A.T., Roberts, D.A., Hochberg, A.K., and Laxman, R., in Advanced Metallization for ULSI Applications in 1993, edited by Favreau, D.P., Shacham-Diamand, Y., and Horiike, Y. (Materials Research Society, Pittsburgh, PA, 1994) p. 57.Google Scholar
13.Peterson, G.A., Omstead, T.R., Smith, P.M., and Gonzales, M.F., Electrochem. Soc. V 93-25 (1993) p. 225.Google Scholar
14.Dubois, L.H. and Zegarski, B.R., J. Electrochem. Soc. 139 (1992) p. 3295.CrossRefGoogle Scholar
15.Ohno, K., Sato, M., and Arita, Y., Proc. Symp. Interconnect, Contact Metallization, Multilevel Metallization (The Electrochemical Society, 1993) p. 316.Google Scholar
16.Ohno, K., Sato, M., and Arita, Y., Extended Abstracts of Solid State Devices and Materials (Jpn. Soc Applied Physics, 1990) p. 215; (1989) p. 157.Google Scholar
17.Farkas, J., Chi, K-M., Kodas, T.T., and Hampden-Smith, M.J., in Advanced Metallization for ULSI Applications, edited by Rana, W.S., Joshi, R.V., and Ohdomari, I. (Materials Research Society, Pittsburgh, PA, 1992) p. 445.Google Scholar
18.Sato, M. and Arita, Y., Jpn. J. Appl. Phys. 32 (1992) p. 3013.CrossRefGoogle Scholar
19.Uttecht, R.R. and Geffken, R., Proc. 8th VLSI Multilevel Interconnection Conf. (IEEE, 1991) p. 20.Google Scholar
20.Kaanta, C.W., Cote, W.J., Cronin, J.E., Landis, H.S., Hill, W.R., and Ryan, J.G., Proc. 8th VLSI Multilevel Interconnection Conf. (IEEE, 1991), p. 144.Google Scholar
21.Murarka, S.P., Steigerwald, J., and Gutmann, R.J., MRS Bulletin XVIII (6) (1993) p. 46.CrossRefGoogle Scholar
22.Awaya, N. and Arita, Y., VLSI Tech. Symp., Kyoto, Japan (1989) p. 35.Google Scholar
23.Arita, Y., Awaya, N., Amazawa, T., and Matsuda, N., Technical Digest of IEDM (1989) p. 893Google Scholar
24.Guthrie, W.L., Desai, M., Colgan, E.G., and Singh, R.P., in Advanced Metallization for ULSI Applications, edited by Rana, V.V.S., Joshi, R.V., and Ohdomari, I. (Materials Research Society, Pittsburgh, PA, 1992) p. 527.Google Scholar
25.Arita, Y., Awaya, N., Ohno, K., and Sato, M., Technical Digest of IEDM (1990) p. 39.Google Scholar
26.Nicolet, M-A., Thin Solid Films 52 (1978) p. 415.Google Scholar
27.Li, J. and Mayer, J.W., MRS Bulletin XVIII (6) (1993) p. 52.CrossRefGoogle Scholar
28.Kang, H-K., Asano, I., Ryu, C., Wong, S.S., and Norman, J.A.T., Proc. 10th VLSI Multilevel Interconnection Conf. (IEEE, 1993) p. 223.Google Scholar
29.Hosoi, N. and Ohshita, Y., Extended Abstracts (54th Autumn Meeting, 1993) (Jpn. Soc. Appl. Phys. Related Societies, 29P-W-5) p. 619.Google Scholar