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Patterned substrate with inverted silicon pyramids for 3C–SiC epitaxial growth: A comparison with conventional (001) Si substrate

Published online by Cambridge University Press:  30 August 2012

Francesco La Via
Affiliation:
IMM-CNR, 95121, Catania, Italy
Giuseppe D’Arrigo
Affiliation:
IMM-CNR, 95121, Catania, Italy
Andrea Severino*
Affiliation:
IMM-CNR, 95121, Catania, Italy; and Epitaxial Technology Center, Contrada Torre Allegra, 95030, Catania, Italy
Nicolò Piluso
Affiliation:
IMM-CNR, 95121, Catania, Italy; and Epitaxial Technology Center, Contrada Torre Allegra, 95030, Catania, Italy
Marco Mauceri
Affiliation:
Epitaxial Technology Center, Contrada Torre Allegra, 95030, Catania, Italy
Christopher Locke
Affiliation:
Electrical Engineering Department, University of South Florida, Tampa, Florida 33620
Stephen E. Saddow
Affiliation:
Electrical Engineering Department, University of South Florida, Tampa, Florida 33620
*
b)Address all correspondence to this author. e-mail: andrea.severino@imm.cnr.it
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Abstract

Development of 3C–SiC-based electronics is hampered by film quality and wafer bow produced during growth on silicon. This work presents an approach aimed to improve the compliance between Si and 3C–SiC by manipulating Si substrate surface with the creation of an array of squared-base Inverted Silicon Pyramids (ISP) and stimulating the annihilation of defects created at the interface. A reduction of stacking fault (SF) linear density to a value of 9.31 × 103 cm−1 has been observed in 9-μm-thick 3C–SiC film on ISP, stimulated by the ISP geometry with SFs forced to meet one another within the first micrometer of growth. The initial growth of 3C–SiC on ISP is described suggesting a peculiar growth mode leading to uniform sample morphology after about 3 μm of growth. Finally, lower residual stress stored in 3C–SiC/ISP samples has been observed, due to a faster stress relaxation mechanism during the film growth.

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Articles
Copyright
Copyright © Materials Research Society 2012

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References

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