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Ion implantation of silicon wafers for defect-reduced doped layer formation with low dopant atom diffusion

Published online by Cambridge University Press:  03 March 2011

Naoto Shigenaka ,
Shigeki Ono ,
Tsuneyuki Hashimoto ,
Motomasa Fuse  and
Nobuo Owada
Naoto Shigenaka
Affiliation:
Energy Research Laboratory, Hitachi Ltd., 7-2-1 Omika, Hitachi, Ibaraki 319-12, Japan
Shigeki Ono
Affiliation:
Energy Research Laboratory, Hitachi Ltd., 7-2-1 Omika, Hitachi, Ibaraki 319-12, Japan
Tsuneyuki Hashimoto
Affiliation:
Energy Research Laboratory, Hitachi Ltd., 7-2-1 Omika, Hitachi, Ibaraki 319-12, Japan
Motomasa Fuse
Affiliation:
Energy Research Laboratory, Hitachi Ltd., 7-2-1 Omika, Hitachi, Ibaraki 319-12, Japan
Nobuo Owada
Affiliation:
Device Development Center, Hitachi Ltd., 2326 Imai, Ome, Tokyo 198, Japan
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Abstract

A new process for ion implantation into silicon wafers was proposed. This process has an additional implantation step to form an amorphous phase. At first self-ions are implanted into a cooled wafer (< −30 °C) to form the amorphous phase, and subsequently dopant atoms are implanted to form a doped layer within the amorphous layer. After annealing above 650 °C, the silicon wafer is completely recrystallized, and no defects with sizes detectable by TEM are present near the doped layer. There is indeed a defect layer in the wafer; however, it lies along the amorphous/crystal interface that is behind the doped layer. The concentration profile of the dopant atoms is not changed during epitaxial recrystallization, and further dopant atom diffusion during annealing is limited to about 0.05 μm, because defect-enhanced diffusion does not occur. The double implantation method is considered to be effective for doped layer formation in the VLSI fabrication process.

Type
Articles
Information
Journal of Materials Research , Volume 9 , Issue 11 , November 1994 , pp. 2987 - 2992
Copyright
Copyright © Materials Research Society 1994

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References

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