Introduction

Handshake circuits are proposed as an intermediary between communicating processes (Tangram programs) and VLSI circuits. Chapter 7 describes the translation of Tangram programs into handshake circuits. This chapter is concerned with the realization of handshake circuits as efficient and testable VLSI circuits. First we observe that the fine-grained parallelism available in VLSI circuits matches the fine-grained concurrency in handshake circuits nicely. The mapping of handshake circuits to VLSI circuits can therefore be relatively direct.

A rather naive mapping is suggested by the following correspondence:

1. a channel corresponds to a set of wires, one per symbol;

2. an event with name a corresponds to a voltage transition along wire a;

3. each handshake component corresponds to a VLSI circuit that satisfies the specification at the transition level.

There is no doubt that the above mapping can result in functional circuits. In general, however, the resulting circuits will be prohibitive in size, poor in performance, probably hard to initialize, and impractical to test for fabrication faults. Concerns for circuit size, performance, initialization and testability are therefore recurring themes in this chapter.

A full treatment of all relevant VLSI-realization issues is beyond the scope of this monograph. Issues that directly relate to (properties of) handshake circuits have been selected for a relatively precise treatment; other topics are sketched more briefly. This chapter discusses:

• peephole optimization: the replacement of subcircuits by cheaper ones;

• relaxation of the receptiveness requirement of handshake processes;

• […]