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Wedge polishing was used to prepare one-dimensional Si n-p junction
and Si p-channel metal-oxide-silicon field effect transistor (pMOSFET)
samples for precise and quantitative electrostatic potential analysis
using off-axis electron holography. To avoid artifacts associated with ion
milling, cloth polishing with 0.02-μm colloidal silica suspension was
used for final thinning. Uniform thickness and no significant charging
were observed by electron holography analysis for samples prepared
entirely by this method. The effect of sample thickness was investigated
and the minimum thickness for reliable results was found to be ∼160
nm. Below this thickness, measured phase changes were smaller than
expected. For the pMOSFET sample, quantitative analysis of two-dimensional
electrostatic potential distribution showed that the metallurgical gate
length (separation between two extension junctions) was ∼54 nm,
whereas the actual gate length was measured to be ∼70 nm by
conventional transmission electron microscopy. Thus, source and drain
junction encroachment under the gate was 16 nm.
In this paper, various types of defects (both threading dislocation and misfit dislocations) in strained Si (sSi) have been analyzed by transmission electron microscopy (TEM). Germanium upper-diffusion has been studied by scanning transmission electron microscopy (STEM) for strained Si on SiGe/SOI. SGOI-devices processed using an optimized thermal budget show minimal Ge diffusion and minimal process related defects. Correlation between the device performance (such as leakage current and reliability) and structural information found in TEM has been established.
SiGe/SOI films have been investigated by transmission electron microscopy (TEM), atomic force microscopy (AFM) and Raman spectroscopy. For low Ge composition (∼ 20%), strain relaxation in the SiGe layer is minimal (<0.25%). For higher Ge content (32%), the tensile strain in a Si capping layer grown on top of SiGe/SOI is 0.46% (a stress of 0.81 GPa). TEM has revealed that most of the resulting defects at the SiGe/SOI interface and move downward. The misfit dislocation (MD) linear density is 17/μm, being consistent with the strain relaxation of the SiGe layer as determined by Raman spectroscopy. Upon thermal annealing, residual strain in the SiGe films has been further relaxed via two major routes (a) introduction of more MDs, and (b) development of surface undulation. High strain relaxation has been achieved in a SiGe layer grown on a higher-Ge content buffer layer.
The formation of interfacial oxide between high-k and Si creates a two-layer dielectric in the MOS structure. In this paper, we present a model to describe electrical breakdown in the two-layer dielectric. Depending on the thickness ratio of the two dielectric layers, electrical breakdown can occur either in one dielectric after the other or simultaneously. In the case of one-by-one breakdown, the current through the two-layer dielectric shows three regimes with applied voltage: tunneling through two layers, tunneling through one layer, and breakdown for both layers. Our model has been compared with experimental data obtained from the HfOx/SiO2 MOS structure, and a good agreement is achieved. This model can be used to estimate either the thickness, breakdown field, or dielectric constant of each of the two dielectric layers. It can also predict the overall breakdown voltage for different combinations of dielectric layers. When combined with C-V measurements, more information about the two-layer dielectric is obtained.
The SiGe:C hetero-structure bipolar transistor (HBT) has turned into a key technology for wireless communication. This paper describes the metrology tools for SiGe epitaxy process control. Two types of analysis are critical, (1) routine control of SiGe base and Si cap thicknesses, location and thickness of the doping layer, doping dose, Ge composition profile, and their uniformity across the wafer; and (2) root-cause analysis on non-routine problems. This is achieved by developing a transmission electron microscopy (TEM) technique allowing a thickness measurement with a reproducibility better than 3 Å. Charge-compensated low-energy secondary ion mass spectrometry (SIMS) using an optical conductivity enhancement (OCE) allows a Ge composition measurement to a required precision of 0.5 at. %.
As the CMOS device dimensions continue to shrink, it is more and more critical to control the process parameters during mass production of advanced VLSI chips in order to achieve high yield and profitability. 2D dopant characterization is one of the critical techniques to resolve manufacturing excursions. A quick access to dopant distribution, especially precise delineation of p-n junction would readily provide critical information for many manufacturing issues, as well as device design and process development. Here we present our approaches to some of those issues with available techniques. The main techniques we used are dopant selective etching (DSE) and scanning probe microscopy based electrical measurements including scanning capacitance microscopy (SCM) and scanning spread resistance microscopy (SSRM). These techniques provided complementary results and showed strengths in solving different issues. We have successfully delineated junction of CMOS devices with 0.13 μm technology with source/drain extensions. Other applications, including diode leakage, well-well isolation, and buried layer delineation with the combination of these methods are presented.
We report a successful unification of standard lithographic approaches (top down), anisotropic etching of atomically smooth surfaces, and controlled crystallization of silicon quantum dots (bottom up) to produce silicon nanoclusters at desired locations. These results complement our previous demonstration of silicon nanocrystal uniformity in size, shape, and crystalline orientation in nanocrystalline silicon (nc-Si)/SiO2 superlattices, and could lead to practical applications of silicon nanocrystals in electronic devices. The goal of this study was to induce silicon nanocrystal nucleation at specific lateral sites in a continuous amorphous silicon (a-Si) film. Nearly all previous studies of silicon nanocrystals are based on films containing isolated nanocrystals with random lateral position and spacing. The ability to define precise two-dimensional arrays of quantum dots would allow each quantum dot to be contacted using standard photolithographic techniques, leading to practical device applications like high-density memories. In this work, a template substrate consisting of an array of pyramid-shaped holes in a (100) silicon wafer was formed using standard microfabrication techniques. The geometry of this substrate then influenced the crystallization of an a-Si/SiO2 superlattice that was deposited on it, resulting in preferential nucleation of silicon nanoclusters near the bottom of the pyramid holes. These clusters are clearly visible in transmission electron microscopy (TEM) images, while no clusters have been observed on the planar surface areas of the template. Possible explanations for this selective nucleation and future device structures will be discussed.
Short-period superlattices consisting of nanocrystalline Si wells and amorphous SiO2 barriers were analyzed using various structural (transmission electron microscopy, atomic force microscopy, and x-ray diffraction) and optical (Raman scattering and spectroscopic ellipsometry) characterization techniques. We observe parallel layers containing polycrystalline Si wells, primarily with <111> orientation, and an interesting surface morphology due to sputtering damage. Raman spectra show a redshift and broadening due to finite-size effects. The ellipsometry data can be described using the effective medium approximation (since the superlattice period is much shorter than the wavelength of the optical excitation) or a superlattice approach based on the Fresnel equations with a polycrystalline Si dielectric function.
We have found a shape transformation of InGaAs quantum dots formed via a fractional monolayer deposition technique on GaAs (001) surfaces. This is evidenced by the bimodal quantum dot height (peaked at 8.5 nm and 14.5 nm) and aspect ratio (peaked at 0.18 and 0.26) distributions. The lateral size, height, and aspect ratio all become convergent, suggesting a simultaneous quantum dot size equalization and shape stabilization. Photoluminescence peaks red shift as a consequence of dot growth, and their line-widths become smaller due to dot shape stabilization and size equalization. A record low inhomogeneous broadening of 18.4 meV at a wavelength of 1180 nm (4 K) is obtained for vertically-aligned, shape-stabilized, and size-equalized InGaAs dots.
In-situ, ultra high vacuum combined scanning tunneling microscope/atomic force microscope (STM/AFM) studies were undertaken to examine the initiation of 3D InAs islands on GaAs (100) and their density and size distribution as a function of growth conditions. A decreasing island density with increasing As4 pressure is observed and points to the significance of strain in affecting In migration and As4 incorporation. A stack of InAs islands separated by GaAs spacer layers exhibit a vertically self-organized growth. Through analysis of a phenomenological model, this is shown to be a consequence of a directional In adatom migration caused by the islandinduced nonuniform strain fields.
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