Element design

Figure 1 plots the detailed structure of the proposed phase-changing element. It is printed on a 1.524 mm-thick Rogers 4003 substrate with a square ring and four biasing lines etched on one side of the substrate. The metal ground is printed on the other side. The square ring has a length of l ₁ and a width of w ₁. The biasing lines here are utilized to connect the adjacent elements and to maintain the current continuity. The length and width of the biasing lines are 2.2 and 0.3 mm, respectively. A gap is inserted in the middle of the ring structure to employ two varactor diodes in each vertical arm. The parameters of this element are summarized here: P = 16 mm, l ₁ = 11.6 mm, w ₁ = 1.5 mm, gap = 0.3 mm.

Fig. 1. Schematic of the HIS element.

The performance of the proposed element has been verified by the simulation in CST using a periodic boundary condition. MA46H120 varactor diode is chosen in this paper. It is simulated as a series RLC circuit which has a resistance of 2.6 Ω, a parasitic inductance of 20 nH, and a variable capacitance tuning from 0.2 to 1.1 pF. The resonant frequency of the element can be defined as the 0° reflection phase [Reference Weily, Bird and Guo16] and it can be changed by controlling the capacitance of the varactor diodes, which also leads to a variation of the HIS reflection phase. It is seen from Fig. 2 that the resonant frequency can be continuously varied from 4.97 GHz (1.1 pF) to 6.18 GHz (0.2 pF). In this paper, only five typical values of 0.2, 0.3, 0.5, 0.8 and 1.1 pF are chosen to show their relevant performances.

Fig. 2. Simulated reflection phase of the proposed HIS element.

For biasing convenience, four biasing lines are employed between two adjacent elements. We simulated the effects with and without biasing lines (marked as N/A in Fig. 3). It is found that without the biasing lines, the resonant frequency will shift to higher frequency. Since the ring is located right in the center of the element structure, when the value of l1 is fixed, the lengths of the biasing lines are determined. The effects of the biasing line width have also been carried out in the simulation with two chosen values of 0.3 and 0.5 mm. It is found that the width of the biasing lines has little effects on the reflection phase. As a result, the influence of biasing lines should not be neglected in the element design.

Fig. 3. The effects of the biasing lines.

Antenna design and analysis

Figure 4 gives the whole structure of the proposed FPC antenna. It is excited by a double-layer square patch antenna. The main patch is located in the middle of the HIS layer with a side length of 13.1 mm. The parasitic patch structure is etched on the bottom layer of a 0.5 mm-thick Rogers 5880 substrate with a side length of 17 mm. It is located h_s higher than the main patch. The parasitic patch is utilized to excite more operating elements on the HIS to achieve a better impedance matching and radiation performances. The FSS superstrate is realized by employing 6 × 6 square-patch unit cells while the HIS structure is employed with 48 phase-changing elements. Figures 4(b) and 4(c) plot the layouts of the proposed HIS and FSS, respectively. The dimensions and performances of the phase-changing element are described in section “Element design”. The period and the size of the FSS unit cell are 20 and 19 mm, respectively. Across the band of interest (5.0–6.2 GHz), the reflection magnitude of the FSS unit cell varies from −0.32 to −0.2 dB, while the reflection phase is changed from −164° to −168°. Its graph is omitted here for brevity.

Fig. 4. The whole antenna structure. (a) Side view, (b) the HIS, (c) the FSS.

For FPC antennas, a maximum realized gain at the broadside is obtained when the cavity height (L_r) satisfies the condition below.

(1)$$L_r = \left({\displaystyle{{\varphi_1 + \varphi_2} \over \pi }} \right)\displaystyle{\lambda \over 4} + N\displaystyle{\lambda \over 2}, \;\quad N = 0, \;1, \;2\ldots $$

where φ ₁ and φ ₂ represent the reflection phases of the FSS and the HIS, respectively. In the design, the operating frequency of 6 GHz is chosen to calculate the cavity height with φ ₁ = −168° and φ ₂ = 73.2° (0.2 pF). The final dimension of the whole structure is 140 mm × 140 mm × 18.5 mm after optimization.

The parasitic patch has a significant effect on the resonant frequency. Figure 5 gives the surface currents induced on the HIS (at the same phase) with and without the parasitic patch. It can be found that when there is no parasitic patch, the currents are generally distributed around the main patch and most parts of the HIS section have not been excited (Fig. 5(a)). When the parasitic patch is employed above the main patch, more currents and elements have been induced on the HIS (Fig. 5(b)). Finally, the height of the parasitic patch h_s = 2 mm is chosen in this design since it has a better impedance matching for all the five selected states.

Fig. 5. The simulated surface currents on the HIS. (a) Without the parasitic patch, (b) with the parasitic patch.

Though the parasitic patch can enhance the cavity performance, it generates new resonant frequencies by exciting higher modes. As shown in Fig. 6 (the case when the capacitance is 0.8 pF), without the parasitic patch, the impedance matching is not acceptable. While with the parasitic patch, the impedance matching at 5.0 GHz is improved significantly as well as generating new resonances at 5.2 and 5.35 GHz. However, only the resonance at 5.0 GHz has the required boresight radiation pattern as plotted in insets of Fig. 6(a). There are nulls at the boresight for other frequency points, which may not affect the operation at 5.0 GHz as plotted in Figs 6(b)–6(d). The performances for other capacitance values have the similar properties and their relevant reflection coefficients and pattern analyses are omitted here.

Fig. 6. Simulated reflection coefficients and patterns when capacitance = 0.8 pF.

Antenna results

A continuous frequency tuning FPC antenna prototype has been fabricated and measured to verify the design principle. Figure 7 shows the prototype of the proposed antenna. Since all the HIS elements in each row have the same capacitance, they can be connected in parallel and only one biasing voltage is needed in this design. Each row has an individual biasing network with two biasing pads for voltage inputs, and a 22 nH surface-mounted RF choke inductor, except for the center row which has been separated by the main patch. Some 0.3 mm-thin metallic biasing striplines are utilized between two adjacent elements for current continuity.

Fig. 7. Prototype of the proposed FPC antenna. (a) The HIS and the parasitic patch, (b) the FSS.

Figure 8 gives a group of simulated and measured reflection coefficient results when the capacitance is 0.5 pF for brevity. Table 1 summarizes the tuning property of the proposed antenna: when the capacitance is varied from 1.1 to 0.2 pF, the simulated resonant frequency changes from 4.88 to 5.85 GHz. Accordingly, the measured results are changed from 4.87 GHz (0.2 V) to 5.84 GHz (5.5 V), which agree well with the simulated ones.

Fig. 8. One typical input reflection coefficients of this design.

Table 1. The performances for the selected five states

The realized gains with frequency for different states and their relevant radiation patterns were measured in a self-built antenna chamber. The realized gains for the selected five states are shown in Fig. 9. It is seen from this graph that the maximum realized gains with different capacitance values can be changed consistently with the variation of the resonant frequencies. The maximum and minimum gains with frequency for the simulated results are 14 dBi (0.3 pF) and 10.5 dBi (1.1 pF), respectively. While the maximum and minimum gains for the measured ones are 14.1 dBi (4.0 V) and 10.2 dBi (0.2 V), respectively. The difference between the simulated and measured maximum gains is less than 1 dB for all the five selected states. Figure 10 plots the normalized radiation patterns at 5.0, 5.25, and 5.8 GHz. It is observed that this FPC antenna design can achieve a broadside radiation and the simulated results are in coincidence with the measured ones.

Fig. 9. Realized gains with different capacitors and biasing voltages. (a) Simulated, (b) measured.

Fig. 10. Normalized patterns of the proposed antenna at different frequencies. (a) 5.0 GHz, (b) 5.25 GHz, (c) 5.8 GHz.

A performance comparison with some other reported frequency tuning designs is given in Table 2. From this table, it is found that the proposed antenna has a much smaller antenna size, a larger frequency tuning range with a relatively small gain variation between different states.

Table 2. Performance comparison between the proposed antenna and some other reported antennas