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Variability of multilevel switching in scaled hybrid RS/CMOS nanoelectronic circuits: theory*

Published online by Cambridge University Press:  05 July 2013

Arne Heittmann*
Affiliation:
Chair of Electrical Engineering and Computer Systems, RWTH Aachen University, Schinkelstrasse 2, 52062 Aachen, Germany
Tobias G. Noll
Affiliation:
Chair of Electrical Engineering and Computer Systems, RWTH Aachen University, Schinkelstrasse 2, 52062 Aachen, Germany
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Abstract

A theory is presented which describes the variability of multilevel switching in scaled hybrid resistive-switching/CMOS nanoelectronic circuits. Variability is quantified in terms of conductance variation using the first two moments derived from the probability density function (PDF) of the RS conductance. For RS, which are based on the electrochemical metallization effect (ECM), this variability is – to some extent – caused by discrete events such as electrochemical reactions, which occur on atomic scale and are at random. The theory shows that the conductance variation depends on the joint interaction between the programming circuit and the resistive switch (RS), and explicitly quantifies the impact of RS device parameters and parameters of the programming circuit on the conductance variance. Using a current mirror as an exemplary programming circuit an upper limit of 2–4 bits (dependent on the filament surface area) is estimated as the storage capacity exploiting the multilevel capabilities of an ECM cell. The theoretical results were verified by Monte Carlo circuit simulations on a standard circuit simulation environment using an ECM device model which models the filament growth by a Poisson process.

Type
Research Article
Copyright
© EDP Sciences, 2013

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Footnotes

*

Contribution to the Topical Issue “International Semiconductor Conference Dresden-Grenoble – ISCDG 2012”, Edited by Gérard Ghibaudo, Francis Balestra and Simon Deleonibus.

References

ITRS roadmap, http://www.itrs.net
Tanachutiwat, S., Liu, M., Wang, W., IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 19, 2023 (2011)CrossRef
Yu, S., Wu, Y., Jeyasingh, R., Kuzum, D., Wong, H.-S.P., IEEE Trans. Electron Devices 58, 2729 (2011)CrossRef
Jo, S.H., Chang, T., Ebong, I., Bhadviya, B.B., Mazumder, P., Lu, W., Nano Lett. 10, 1297 (2010)CrossRef
Snider, G., Nanotechnology 18, 1 (2007)
Driscaoll, T., Quinn, J., Klein, S., Kim, H.T., Kim, B.J., Pershin, Y.V., DiVentra, M., Basov, D.N., Appl. Phys. Lett. 97, 093502 (2010)CrossRef
Chen, A., Lin, M.-R., in Reliability Physics Symposium (IRPS), 2011 IEEE International, Monterey, California, USA, 2011, pp. MY.7.1MY.7.4 Google Scholar
Heittmann, A., Noll, T.G., in Procs. of ACM/IEEE Nanoarch, 2012, Amsterdam, The Netherlands, 2012
Lee, C.B., Lee, D.S., Benayad, A., Lee, S.R., Chang, M., Lee, M.-J., Hur, J.Y., Kim, C.J., Chung, U.-I., IEEE Electron Device Lett. 32, 399 (2011)CrossRef
Tseng, Y.H., Huang, C.-E., Kuo, C.-H., Chih, Y.-D., Lin, C.J., in Electron Devices Meeting (IEDM), Baltimore, USA, 2009 IEEE International, 2009, pp. 14
Rahaman, S.Z., Maikap, S., Lin, C.-H., Tzeng, P.-J., Lee, H.Y., Wu, T.-Y., Chen, Y.S., Chen, F., Kao, M.-J., Tsai, M., in VLSI Technology Systems and Applications (VLSI-TSA), International Symposium on, Hsinchu, Taiwan, 2010, pp. 134135
Liu, Q., Liu, M., Long, S., Wang, W., Zhang, M.H., Wang, Q., Chen, J., in Solid State Device Research Conference, 2009, ESSDERC ‘09. Proceedings of the European, Athens, Greece, 2009, pp. 221224
Lin, M.-H. et al., J. Phys. D: Appl. Phys. 43, 295404 (2010)CrossRef
Liu, K.-C., Tzeng, W.-H., Chang, K.-M., Chan, Y.-C., Kuo, C.-C., Thin Solid Films 518, 7460 (2010)CrossRef
Kund, M., Beitel, G., Pinnow, C.-U., Rohr, T., Schumann, J., Symanczyk, R., Ufert, K.-D., Muller, G., in Electron Devices Meeting, 2005, IEDM Technical Digest. IEEE International, Washington, USA, 2005, 754757CrossRefGoogle Scholar
Schindler, C., Meier, M., Waser, R., Kozicki, M.N., in NVMTS, Albuquerque, New Mexico, USA, 2007, pp. 8285
Heittmann, A., Noll, T.G., in GLSVLSI, Salt Lake City, USA, 2012, pp. 227231
Heittmann, A., Noll, T.G., in ISCDG 2012, Grenoble, pp. 1316
Menzel, S., Böttger, U., Waser, R., J. Appl. Phys. 111, 014501 (2012)CrossRef
Simmons, J.G., J. Appl. Phys. 34, 1793 (1963)CrossRef
Ya, S., Wong, H.S., IEEE Trans. Electron Devices 58, 1352 (2011)
Soni, R., Meuffels, P., Staikov, G., Weng, R., Kügeler, C., Petraru, A., Hambe, M., Waser, R., Kohlstedt, H., J. Appl. Phys. 110, 054509 (2011)CrossRef
Waser, R., Dittmann, R., Staikov, G., Szot, K., Adv. Mater. 21, 2632 (2009)CrossRef
Bockris, J.O’M., Reddy, A.K.N., Gamboa-Aldeco, M.E., Modern Electrochemitry 2A, 2nd edn. (Kluwer Academic Publishers, New York, 2000)Google Scholar
Querlioz, D. et al., in Procs. of ACM/IEEE Nanoarch, 2012, Amsterdamm, The Netherlands, 2012
Meng, B., Weinberg, W.H., Surf. Sci. 364, 151 (1996)CrossRef
Liu, S.C., Kramer, J., Indiveri, G., Delbrück, T., Douglas, R., Analog VLSI: Circuits and Principles (MIT Press, Cambridge, MA, 2002)Google Scholar
Nagel, L.W., Pederson, D.O., SPICE (Simulation Program with Integrated Circuit Emphasis), Memorandum No. ERL-M382 (University of California, Berkeley, 1973)Google Scholar