Thermal fatigue of flip-chip solder joints between a chip and chip carrier is a serious reliability concern. Differences in the temperature and/or in the coefficients of thermal expansion between the chip and substrate lead to stresses which may result in fatigue damage and eventual failure of the interconnect. Conventionally, the solder lives have been estimated by a Coffin-Manson type relation. However, this largely empirical approach becomes inadequate when comparing thermal histories that are widely different, as in the cases of accelerated thermal cycling and power cycling. In this study, we use a damage integral approach where the fatigue damage rate is calculated based on the momentary stress and strain (estimated analytically) experienced by the solder joints. The momentary damage is then integrated over the entire loading history to yield total damage at any moment.