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Relaxed Silicon-Germanium on Insulator (SGOI)

Published online by Cambridge University Press:  15 March 2011

Zhiyuan Cheng
Affiliation:
Massachusetts Institute of Technology Department of Materials Science and Engineering 77 Massachusetts Ave. Cambridge, MA 02139, (E-mail: cheng@MTL.MIT.EDU)
Matthew T. Currie
Affiliation:
Massachusetts Institute of Technology Department of Materials Science and Engineering 77 Massachusetts Ave. Cambridge, MA 02139
Chris W. Leitz
Affiliation:
Massachusetts Institute of Technology Department of Materials Science and Engineering 77 Massachusetts Ave. Cambridge, MA 02139
Gianni Taraschi
Affiliation:
Massachusetts Institute of Technology Department of Materials Science and Engineering 77 Massachusetts Ave. Cambridge, MA 02139
Minjoo L. Lee
Affiliation:
Massachusetts Institute of Technology Department of Materials Science and Engineering 77 Massachusetts Ave. Cambridge, MA 02139
Arthur Pitera
Affiliation:
Massachusetts Institute of Technology Department of Materials Science and Engineering 77 Massachusetts Ave. Cambridge, MA 02139
Judy L. Hoyt
Affiliation:
Department of Electrical Engineering and Computer Science 77 Massachusetts Ave. Cambridge, MA 02139
Dimitri. A. Antoniadis
Affiliation:
Department of Electrical Engineering and Computer Science 77 Massachusetts Ave. Cambridge, MA 02139
Eugene A. Fitzgerald
Affiliation:
Department of Electrical Engineering and Computer Science 77 Massachusetts Ave. Cambridge, MA 02139
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Abstract

We have fabricated high quality SGOI substrates and demonstrated high mobility enhancement in strained-Si MOSFET's fabricated on the relaxed SGOI substrates with a Ge content of 25%. The substrates were fabricated by wafer bonding. The initial relaxed Si1−xGex layers were grown on Si donor substrates by a graded epitaxial growth technology using ultrahigh vacuum chemical vapor deposition (UHVCVD). The SiGe wafers were then bonded to oxidized silicon handle wafers. Two different approaches have been developed to fabricate SGOI substrates: an etch-back process utilizing a 20% Ge layer as a natural etch stop, and a hydrogen-induced wafer delamination process using H+ implantion. The resultant SiGe film quality was compared among the different approaches. Large-area strained-Si MOSFET's were then fabricated on the SGOI substrates. Epitaxial regrowth was used to produce the upper portion of the relaxed SiGe and the surface strained Si layer. The measured electron mobility shows significant enhancement over both the universal mobility and that of co-processed bulk-Si MOSFET's. This SGOI process has a low thermal budget and thus is compatible with a wide range of Ge contents in Si1−xGex layer.

Type
Research Article
Copyright
Copyright © Materials Research Society 2002

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