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Optimization of SI-Wafer Cleaning and the use of Buffer-Layers for Epitaxial Growth of Sige-Layers by VLPCVD at T = 650 C

Published online by Cambridge University Press:  25 February 2011

Matty R. Caymax ,
J. Poortmans ,
A. Van Ammel ,
W. Vandervorst ,
J. Vanhellemont  and
J. Nijs
Matty R. Caymax
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
J. Poortmans
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
A. Van Ammel
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
W. Vandervorst
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
J. Vanhellemont
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
J. Nijs
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
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Abstract

For low-temperature epi-growth in UHV-CVD-systems, the pre-epi, ex-situ cleaning of Si-wafers is known to be very critical. Various ways of etching the chemical oxide-layer after RCA-cleaning have been analysed by SIMS-measurements of the interfacial C, 0 and Bcontamination. Layer growth was performed at 650 C under a flow of 20 sccm of silane at 0.26 Pa. The best results (C and 0 below 2 % of a monolayer, and no detectable amounts of B) were obtained with “dry” etch-procedures, i.e. in which no water-rinse was applied after a normal 2 % HF-dip, or where 1F-vapour was used instead. Growth of Si1-xGex-layers with x < 0.1 succeeds quite well on such prepared substrates; for x between 0.1 and 0.25, we have found the use of a thin, pure Si-buffer layer (150 Å) to be indispensable. For x > 0.25, the growing layer can become quite rough, although this varies in time.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 259: Symposium B – Chemical Surface Preparation, Passivation and Cleaning for Semiconductor Growth and Processing , 1992 , 461
Copyright
Copyright © Materials Research Society 1992

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References

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