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Limited Reaction Processing: Silicon and III–V Materials

Published online by Cambridge University Press:  28 February 2011

James F. Gibbons
Affiliation:
Stanford Electronics Laboratories, Stanford, Ca 94305
S. Reynolds
Affiliation:
Stanford Electronics Laboratories, Stanford, Ca 94305
C. Gronet
Affiliation:
Stanford Electronics Laboratories, Stanford, Ca 94305
D. Vook
Affiliation:
Stanford Electronics Laboratories, Stanford, Ca 94305
C. King
Affiliation:
Stanford Electronics Laboratories, Stanford, Ca 94305
W. Opyd
Affiliation:
Stanford Electronics Laboratories, Stanford, Ca 94305
S. Wilson
Affiliation:
Charles Evans & Associates, Redwood City, CA 94063
C. Nauka
Affiliation:
Hewlett-Packard Materials Characterization Laboratory, Palo Alto, CA 94304
G. Reid
Affiliation:
Hewlett-Packard Materials Characterization Laboratory, Palo Alto, CA 94304
R. Hull
Affiliation:
Hewlett-Packard Materials Characterization Laboratory, Palo Alto, CA 94304
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Abstract

Limited Reaction Processing (LRP) is a new technique which combines Rapid Thermal Processing (RTP) and Chemical Vapor Deposition (CVD). The added temperature control provided in rapid thermal processing enables the use of substrate temperature as a reaction switch. In addition, rapid thermal technology has been shown to provide other advantages for chemical vapor deposition of Si and III–V materials. Results are presented for group IV materials including epitaxial Si, SiGe alloys, SiO2 , and polysilicon. MOSFETs have been demonstrated and sensitive tests of interface quality are presented, paving the way for future bipolar transistor fabrication. III–V materials such as GaAs, AlGaAs, InGaAs have been grown. GaAs electron mobilities are the best reported for material grown using trimethylarsenic. As-ambient rapid thermal anneals of GaAs have also been performed.

Type
Research Article
Copyright
Copyright © Materials Research Society 1987

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References

REFERENCES

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