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Iron Deposition From SC-1 on Silicon Wafer Surfaces

Published online by Cambridge University Press:  15 February 2011

S. Dhanda ,
C. R. Helms ,
P. Gupta ,
B. B. Triplett  and
M. Tran
S. Dhanda
Affiliation:
Solid State Electronics Laboratory, Stanford University, Stanford, CA 94305
C. R. Helms
Affiliation:
Solid State Electronics Laboratory, Stanford University, Stanford, CA 94305
P. Gupta
Affiliation:
Intel Corporation, Santa Clara, CA
B. B. Triplett
Affiliation:
Intel Corporation, Santa Clara, CA
M. Tran
Affiliation:
Intel Corporation, Santa Clara, CA
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Abstract

This work examines the extent of the deposition of iron on the wafer from (iron) contaminated SC-1 solutions on silicon wafer surfaces, models this effect, and also predicts the chemical state of the iron thus deposited on the wafer surface. The deposition of iron from SC-1 on three different wafer surface terminations was studied. The surfaces were characterized by: (i) the presence of ∼10 Å of native oxide, (ii) by relatively little native oxide and (iii) by a thick thermal oxide. Experiments were performed at room temperature using a 1:1:5 SC-1 (NH4 OH-H2O2-H2O) solution, and also at 80°C with a more dilute composition (0.25:0.5:5). We found that irrespective of the initial surface termination, the amount of iron deposited on the silicon surface from SC-1 exhibited remarkably little deviation over a wide range of spiking levels, leading to the conclusion that in all cases an initial rapid oxidation of the silicon took place, followed by the preferential oxidation of the iron and its inclusion as the oxide into the oxide film. Finally, the model developed predicts that lower temperatures and more concentrated chemistries are more effective in keeping the iron in solution.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 386: Symposium O – Ultraclean Semiconductor Processing Technology and Surface , 1995 , 201
Copyright
Copyright © Materials Research Society 1995

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References

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