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Integration of Solid Phase Epitaxial Re-Growth, Flash and Sub-Melt Laser Annealing for S/D Junctions in CMOS Digital Technology

Published online by Cambridge University Press:  01 February 2011

Simone Severi
Affiliation:
severis@imec.be, IMEC, SPDT, Kapeldreef 75, Leuven, Belgium, 3001, Belgium, 003216283579
Emmanuel Augendre
Affiliation:
Augendre@imec.be, IMEC, SPDT, Kapeldreef 75, Leuven, Belgium, 3001, Belgium
Kristin De Meyer
Affiliation:
DeMeyer@imec.be, IMEC, SPDT, Kapeldreef 75, Leuven, Belgium, 3001, Belgium
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Abstract

Several aspects of the integration of diffusion-less junctions in a NMOS and PMOS conventional flows are evaluated. Processes as Solid Phase Epitaxial Regrowth (SPER) or advanced annealing techniques, as flash or laser, demonstrates benefits not only on the 1D junction profiles but also on the transistor characteristics. An optimization of the implants and of the annealing conditions lead to improved or equivalent transistors performance and short channel effects control compared to the conventional spike RTA process. A significant gain in the overlap capacitance could allow for reduced CV/I. Furthermore the junction leakage can be lowered down to the values reached with the conventional spike RTA process.

Type
Research Article
Copyright
Copyright © Materials Research Society 2006

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