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In‐Situ Mapping and Modeling Verification of Thermomechanical Deformation in Underfilled Flip‐Chip Packaging Using Moiré Interferometry

Published online by Cambridge University Press:  10 February 2011

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Abstract

An experimental technique of environmental moiré interferometry has been developed for in‐situ monitoring and analysis of thermomechanical deformation of microelectronics packages subjected to thermal loading under a controlled atmosphere. Coupled with fractional fringe analysis and digital image processing, the environmental moiré interferometry technique achieves accurate and realistic deformation monitoring with high sensitivity and excellent spatial resolution. It has been applied to investigate the thermomechanical deformations induced by thermal loading in an underfilled flip‐chip‐on‐board packaging. The effects of temperature change in the range of 102 °C to 22 °C are analyzed for underfill and solder bumps. In addition, shear deformation and shear strains across the solder bumps are determined as a function of temperature. The experimental results are compared with the results of a finite element analysis for modeling verification. Good agreement between the modeling results and experimental measurements has been found in the overall displacement fields. Through this study, the role of underfill in the thermomechanical deformation of the underfilled flip‐chip package is determined.

Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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References

1 Norris, K. C. and Landzberg, A. H., IBM Journal of Research and Development, 13 (3), May 1969, pp. 266271.Google Scholar
2 Clementi, J., McCreary, J., Niu, T. M., Palomaki, J., Varcoe, J., and Hill, G., “Flip‐Chip Encapsulation on Ceramic Substrates,” Proceedings of the 43rd ECTC, Orlando, FL, 1993, pp. 175181.Google Scholar
3 Suryanarayana, D., Hsiao, R., Gall, T. P., and McCreary, J. M., “Flip‐Chip Solder Bump Fatigue Enhancement by Polymer Encapsulation,” IEEE Trans. of Components & Hybrid and Manufacturing Technology,Vol. 16, No. 8, 1993, pp. 858.Google Scholar
4 Guo, Y., Chen, W. T. and Lim, C. K., “Experimental Determinations of Thermal Strains in Semiconductor Packaging Using Moiré Interferometry,” Proceedings of the ASME Conference on Electronic Packaging, San Jose, CA, 1992, pp.779783.Google Scholar
5 Ho, P. S., Dai, X., and Willecke, R., “The environmental chamber and supporting carriage for moiré interferometry,” Intellectual Property Disclosure, the University of Texas at Austin, 1995.Google Scholar
6 Minutes of SEMATECH Liquid Encapsulant Enhancement PTAB Meeting, Albuquerque, NM, February 8, 1996.Google Scholar
7 Dai, X., Kim, C., Willicke, R., Poon, T., and Ho, P. S., “ln‐situ Moiré Interferometry Study of Thermomechanical Deformation in Glop‐top Encapsulated Chip‐on‐board Packaging,” Experimental/Numerical Mechanics in Electronic Packaging, Vol. 1, 1996, in press.Google Scholar
8 Guo, Y., Post, D., and Czarnek, R., “The Magic of Carrier Patterns in Moiré Interferometry,” Experimental Mechanics, Vol. 29, No. 2, June, 1989.Google Scholar
9 Voloshin, A. S., Burger, C. P., Rowlands, R. E., and Richard, T. G., “Fractional Moiré Strain Analysis Using Digital Imaging Techniques,” Experimental Mechanics, 26(1), 1986, pp. 254258.Google Scholar