As the typical feature size of silicon integrated circuits, such as in VLSI technology, has become smaller, the surface cleanliness of silicon wafers has become more important. Hence, detection of trace impurities introduced during the processing steps is essential. A novel technique, consisting of a “Charged Particle Energy Filter (CPEF)” used in the path of the scattered helium ions in the conventional Rutherford Backscattering geometry, is proposed and its merits and limitations are discussed. In this technique, an electric field is applied across a pair of plates placed before the detector so that backscattered particles of only a selected energy range go through slits to strike the detector. This can be used to filter out particles from the lighter substrate atoms and thus reduce pulse pileup in the region of the impurity signal. The feasibility of this scheme was studied with silicon wafers implanted with 1×1014 and 1×1013 14pe/cm2 at energy of 35 keV, and a 0.5 MeV He+ analysis beam. It was found that the backscattered ion signals from the Si atoms can be reduced by more than three orders of magnitude. This suggests the detection limit for contaminants can be improved by at least two orders of magnitude compared to the conventional Rutherford Backscattering technique. This technique can be incorporated in 200–300 kV ion implanters for monitoring of surface contaminants in samples prior to implantation.