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High Quality GaAs on Si and its Application to a Solar Cell

Published online by Cambridge University Press:  26 February 2011

Yoshiro Ohmachi
Affiliation:
NTT Applied Electronics Laboratories 3-9-11 Midori-cho, Musashino-shi, Tokyo 180, JAPAN
Yoshiaki Kadota
Affiliation:
NTT Applied Electronics Laboratories 3-9-11 Midori-cho, Musashino-shi, Tokyo 180, JAPAN
Yoshio Watanabe
Affiliation:
NTT Applied Electronics Laboratories 3-9-11 Midori-cho, Musashino-shi, Tokyo 180, JAPAN
Hiroshi Okamoto
Affiliation:
NTT Applied Electronics Laboratories 3-9-11 Midori-cho, Musashino-shi, Tokyo 180, JAPAN
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Abstract

Epitaxial growth using thermal annealing and a strained layer superlattice is studied to obtain high-quality GaAs device layers on Si substrates. Crystalline quality of GaAs-on-Si is found to improve with thermal cyclic annealing at temperatures higher than the growth temperature and cooling down to 300°C. It is also found that the optimum InGaAs/GaAs strained layer superlattice buffer structure is one whose total thickness is several times the calculated critical thickness for the average In-mole fraction of the SLS buffer. Configurations and structures of dislocation reductions are ex-amined by TEM observations. A GaAs solar cell is successfully constructed and is found to show total area efficiencies of 18.3% under AM 0 and 20.0% under AM 1.5 conditions.

Type
Research Article
Copyright
Copyright © Materials Research Society 1989

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References

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