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Gettering of Interstitial Iron in P/P+ Epitaxial Silicon Wafers

Published online by Cambridge University Press:  26 February 2011

W. Wijaranakula ,
X. Gao ,
K. Curtis  and
H. Haddad
W. Wijaranakula
Affiliation:
Shin-Etsu, SEH America, Inc., 4111 NE 112th Avenue, Vancouver, Washington 98682
X. Gao
Affiliation:
Shin-Etsu, SEH America, Inc., 4111 NE 112th Avenue, Vancouver, Washington 98682
K. Curtis
Affiliation:
Shin-Etsu, SEH America, Inc., 4111 NE 112th Avenue, Vancouver, Washington 98682
H. Haddad
Affiliation:
Hewlett Packard Company, Northwest Integrated Circuits Division, 1020 Northeast Boulevard, Corvallis, Oregon 97330.
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Abstract

Gettering of interstitial iron in p/p+ epitaxial silicon wafers during an integrated circuit device simulation annealing was examined. The results from the deep level transient spectroscopy and optical microscope examination suggest no correlation between the interstitial iron concentration in the epitaxial layer and the bulk microdefect density. An electron microscopic analysis revealed that gettering of interstitial iron took place at an oxide polyhedral precipitate located at the center of a bulk stacking fault. By comparing the results of iron implanted to non-implanted samples, it is concluded that iron gettering occurs via a phase transformation of Si02 to an α FeSi2 iron disilicide. In this study, it is suggested that gettering of iron atoms is fundamentally different from that of other transition metals where the silicide formation occurs predominantly along the Frank partial dislocations of the bulk stacking fault.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 378: Symposium B – Defect and Impurity-Engineered Semiconductors and Devices , 1995 , 309
Copyright
Copyright © Materials Research Society 1995

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