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GaP-based MIS Capacitors Using a SiN Gate Dielectric

Published online by Cambridge University Press:  01 February 2011

A. Chen
Affiliation:
Department of Electrical Engineering Yale University, 15 Prospect Street New Haven, CT 06511, U.S.A
J. Woodall
Affiliation:
Department of Electrical Engineering Yale University, 15 Prospect Street New Haven, CT 06511, U.S.A
X.W. Wang
Affiliation:
Department of Electrical Engineering Yale University, 15 Prospect Street New Haven, CT 06511, U.S.A
T.P. Ma
Affiliation:
Department of Electrical Engineering Yale University, 15 Prospect Street New Haven, CT 06511, U.S.A
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Abstract

Gallium Phosphide (GaP) Metal-Insulator-Semiconductor (MIS) capacitors were fabricated with synthesized SiN as the gate dielectric. The interface property and the SiN bulk quality were studied with capacitance-voltage (C-V) measurements and current-voltage (I-V) measurements. The total interface state density of 3×1012 cm-2 and the fixed charge density in SiN of 7×1012cm-2 were estimated from the C-V measurements. The leakage current density was as low as 15nA/cm2 at an effective electric field of 3MV/cm. The effective electric field in SiN at breakdown was as high as 10MV/cm. Constant current stress measurements showed bulk trap density of 2×1011 cm-2 in SiN, which is much lower than that for CVD SiN or SiO2.

Type
Research Article
Copyright
Copyright © Materials Research Society 2003

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