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Fabrication of Strain Relaxed Silicon-Germanium-on-Insulator (Si0.35Ge0.65OI) Wafers using Cyclical Thermal Oxidation and Annealing

Published online by Cambridge University Press:  01 February 2011

Grace Huiqi Wang
Affiliation:
g0404219@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Lab Engineering drive 3, Singapore, 459441, Singapore
Eng-Huat Toh
Affiliation:
g0402602@nus.edu.sg, National University of Singapore, Singapore, 459441, Singapore
Chih-Hang Tung
Affiliation:
g0404219@nus.edu.sg, Institutue of Microelectronics, Singapaore, 117685, Singapore
Yong-Lim Foo
Affiliation:
g0404219@nus.edu.sg, Institute of Materials Research & Engineering, Singapaore, 117602, Singapore
S. Tripathy
Affiliation:
g0404219@nus.edu.sg, Institute of Materials Research & Engineering, Singapaore, 117602, Singapore
Guo-Qiang Lo
Affiliation:
g0404219@nus.edu.sg, Institutue of Microelectronics, Singapaore, 117685, Singapore
Ganesh Samudra
Affiliation:
eleshanr@nus.edu.sg, National University of Singapore, Singapore, 459441, Singapore
Yee-Chia Yeo
Affiliation:
eleyeoyc@nus.edu.sg, National University of Singapore, Singapore, 459441, Singapore
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Abstract

A novel scheme for the fabrication of SiGe-on-insulator (SGOI) substrates comprising a thin and relaxed silicon-germanium (SiGe) layer with high Ge mole fraction is reported. A cyclical thermal oxidation and annealing (CTOA) process is introduced to alleviate issues associated with surface roughening and non-uniformity in Ge content. A systematic study of the stress developed in the SiGe layer as condensation takes place is presented. A clear understanding of the strain evolution enables the SGOI substrate fabrication to be tailored according to the requirements of strain engineering in high mobility MOSFETs.

Type
Research Article
Copyright
Copyright © Materials Research Society 2007

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