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A Dual-Function Uhv-Compatible Chamber for i) Low-Temperature Plasma-Assisted Oxidation, and ii) High-Temperature Rapid Thermal Processing of Si-Based Dielectric Gate Heterostructures

Published online by Cambridge University Press:  21 February 2011

S. Hattangady ,
X-L Xu ,
M.J. Watkins ,
B. Hornung ,
V. Misra ,
G. Lucovsky  and
J.J. Wortman
S. Hattangady
Affiliation:
Departments of Materials Science and Engineering, Electrical and Computer Engineering, and Physics, North Carolina State University, Raleigh, NC 27695
X-L Xu
Affiliation:
Departments of Materials Science and Engineering, Electrical and Computer Engineering, and Physics, North Carolina State University, Raleigh, NC 27695
M.J. Watkins
Affiliation:
Departments of Materials Science and Engineering, Electrical and Computer Engineering, and Physics, North Carolina State University, Raleigh, NC 27695
B. Hornung
Affiliation:
Departments of Materials Science and Engineering, Electrical and Computer Engineering, and Physics, North Carolina State University, Raleigh, NC 27695
V. Misra
Affiliation:
Departments of Materials Science and Engineering, Electrical and Computer Engineering, and Physics, North Carolina State University, Raleigh, NC 27695
G. Lucovsky
Affiliation:
Departments of Materials Science and Engineering, Electrical and Computer Engineering, and Physics, North Carolina State University, Raleigh, NC 27695
J.J. Wortman
Affiliation:
Departments of Materials Science and Engineering, Electrical and Computer Engineering, and Physics, North Carolina State University, Raleigh, NC 27695
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Abstract

A combination of i) low-temperature, 300-400°C, plasma-assisted oxidation to form the SiO2/Si interfaces, and ii) 800°C rapid thermal chemical vapor deposition, RTCVD, to deposit SiO2 thin films have been used to fabricate gate-oxide heterostructures. This sequence separates SiO2/Si interface formation by the oxidation process from the deposition of the bulk oxide layer by RTCVD. These two processes were performed in situ and sequentially in a single-chamber, ultraclean quartz reactor system. We have studied the chemistry of the interface formation process by Auger electron spectroscopy, AES, and the electrical properties of MOS devices with Al electrodes by C-V techniques.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 303: Symposium G – Rapid Thermal and Integrated Processing II , 1993 , 339
Copyright
Copyright © Materials Research Society 1993

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References

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