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DLTS Characterization of N-Type Silicon After Rapid Thermal Annealing of Boron Implantation

Published online by Cambridge University Press:  26 February 2011

C. M. Ransom ,
T. O. Sedgwick  and
S. A. Cohen
C. M. Ransom
Affiliation:
IBM T. J. Watson Research Center Yorktown Heights, New York 10598
T. O. Sedgwick
Affiliation:
IBM T. J. Watson Research Center Yorktown Heights, New York 10598
S. A. Cohen
Affiliation:
IBM T. J. Watson Research Center Yorktown Heights, New York 10598
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Abstract

DLTS measurements show that majority-carrier traps exist after quartz-lamp, rapid-thermal annealing (RTA) activation of B+ and BF2+ ion implants in n-type silicon. Levels at Ec-0.17, 0.27, 0.44 and 0.57 eV annealed out with an additional 20 minute isochronal anneal at 550°C in argon. A stable defect at 0.37 eV existed at temperatures above 750°C. DLTS measurements of a Schottky diode on n-type silicon after only RTA indicated that electron traps could be introduced into n-type silicon by the RTA alone.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 52: Symposium B – Rapid Thermal Processing , 1985 , 153
Copyright
Copyright © Materials Research Society 1986

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