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Direct-Writing of High-Aspect-Ratio Trenches in Silicon

Published online by Cambridge University Press:  28 February 2011

G. V. Treyz
Affiliation:
Microelectronics Sciences Laboratories, Columbia University, New York, New York 10027
R. Beach
Affiliation:
Microelectronics Sciences Laboratories, Columbia University, New York, New York 10027
R. M. Osgood Jr.
Affiliation:
Microelectronics Sciences Laboratories, Columbia University, New York, New York 10027
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Abstract

Deep trenches have been etched in crystalline silicon with polarization-controlled, variable-curvature walls. Scan speeds of up to 10mm/s have been demonstrated. A model of the etching process has been developed which is based on a local, melt-enhanced etch rate. Comparisons of model predictions and experimental data are presented.

Type
Articles
Copyright
Copyright © Materials Research Society 1987

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References

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