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Die-on-Wafer and Wafer-Level Three-Dimensional (3D) Integration of Heterogeneous IC Technologies for RF-Microwave-Millimeter Applications

Published online by Cambridge University Press:  01 February 2011

J.-Q. Lu ,
S. Devarajan ,
A. Y. Zeng ,
K. Rose  and
R. J. Gutmann
J.-Q. Lu
Affiliation:
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York-12180, USA, luj@rpi.edu
S. Devarajan
Affiliation:
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York-12180, USA, luj@rpi.edu
A. Y. Zeng
Affiliation:
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York-12180, USA, luj@rpi.edu
K. Rose
Affiliation:
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York-12180, USA, luj@rpi.edu
R. J. Gutmann
Affiliation:
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York-12180, USA, luj@rpi.edu
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Abstract

Die-on-wafer and wafer-level three-dimensional (3D) integrations of heterogeneous IC technologies are briefly described, emphasizing a specific 3D hyper-integration platform using dielectric adhesive wafer bonding and Cu damascene inter-wafer interconnects to provide a perspective on wafer-level 3D technology processing. Wafer-level 3D partitioning of high Q passive components, analog-to-digital (A/D) converters, RF transceivers, digital processors, and memory is discussed for high-performance RF-microwave-millimeter applications, especially where high manufacturing quantities are anticipated. Design and simulation results of 3D heterogeneous integration are presented. This 3D technology is applicable to smart wireless terminals, millimeter phased array radars, and smart imagers.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 833: Symposium G – Materials, Integration, and Packaging Issues for High-Frequency Devices II , 2004 , G6.8
Copyright
Copyright © Materials Research Society 2005

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References

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