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Defect Generation During Epitaxial Growth of CoSi2 on Miniature Sized (100) Si Substrate and its Effect on Electrical Properties

Published online by Cambridge University Press:  15 February 2011

Jeong Soo Byun
Affiliation:
UILSI Laboratory of LG Semicon Co. Ltd., 1, Hyangjeong-dong, Cheongju-si 360–480, Korea
Jeong Min Seon
Affiliation:
UILSI Laboratory of LG Semicon Co. Ltd., 1, Hyangjeong-dong, Cheongju-si 360–480, Korea
Jin Won Park
Affiliation:
UILSI Laboratory of LG Semicon Co. Ltd., 1, Hyangjeong-dong, Cheongju-si 360–480, Korea
Hyunsang Hwang
Affiliation:
UILSI Laboratory of LG Semicon Co. Ltd., 1, Hyangjeong-dong, Cheongju-si 360–480, Korea
Jae Jeong Kim-
Affiliation:
UILSI Laboratory of LG Semicon Co. Ltd., 1, Hyangjeong-dong, Cheongju-si 360–480, Korea
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Abstract

Self-aligned silicide (salicide) formation of epitaxial CoSi2, using a Co/Ti bilayer, on linear oxide (SiO2) patterned (100)Si substrate has been investigated. Rapid thermal annealing (RTA) at 550°C resulted in the lateral encroachment of silicide in the Si under the edge of the oxide. After RTA at 900°C, even though an epitaxial CoSi2 layer was formed on the Si substrate, defects such as lateral encroachment and voids were generated under the edge of the oxide. It was found that such defects lead to device failure due to the deterioration of the gate oxide and the shallow junction.

Type
Research Article
Copyright
Copyright © Materials Research Society 1996

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