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CW Laser Annealed Small-Geometry NMOS Transistors

Published online by Cambridge University Press:  22 February 2011

A.A. Naem ,
A.R. Boothroyd  and
I.D. Calder
A.A. Naem
Affiliation:
Dept. of Electronics, Carleton University, Ottawa, Canada,
A.R. Boothroyd
Affiliation:
Dept. of Electronics, Carleton University, Ottawa, Canada,
I.D. Calder
Affiliation:
Northern Telecom Electronics Ltd., Ottawa, Canada K1Y 4H7
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Abstract

Small geometry NMOS transistors were fabricated using junctions implanted with 1016; Asplus;/cm2; @ 180 keV and annealed through 1067 Å of SiO 2; with a cw argon laser. Phosphosilicate glass densification was the only other high temperature step. Channel lengths were varied from 1.3 to 50 μ. and channel widths from 1 to 50,μ. Physical characterization of these devices revealed a junction depth of 3000 Å with negligible lateral diffusion. The smallest transistor had approximately a square channel with WxL = 1×l.3μ2;. IDS;−VDS; characteristics of this device were similar to those of large geometry devices due to counteracting short and narrow channel effects. The threshold voltage was 0.61±0.013 V across an entire wafer, while there was no punch-through for VDS;<13 V and no avalanche breakdown for VDS; < 14 V. The junctions showed a forward-biased ideality factor of 1.17, and the contact resistance in an 8 × 8 μ2; area was 1.5Ω to the source/drain regions and 0.5Ω to laser-recrystallized polysilicon interconnects. It is concluded that cw laser annealing can be used to fabricate small-geometry devices with excellent performance and without any deleterious effects.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 23 , 1983 , 229
Copyright
Copyright © Materials Research Society 1984

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References

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