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Comparison of Conventional and Self-Aligned a-Si:H Thin Film Transistors

Published online by Cambridge University Press:  10 February 2011

Chien-Sheng Yang ,
Walter W. Read ,
Chris B. Arthur  and
Gregory N. Parsons
Chien-Sheng Yang
Affiliation:
Dept. of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695
Walter W. Read
Affiliation:
Dept. of Chemical Engineering, North Carolina State University, Raleigh, NC 27695
Chris B. Arthur
Affiliation:
Dept. of Chemical Engineering, North Carolina State University, Raleigh, NC 27695
Gregory N. Parsons
Affiliation:
Dept. of Chemical Engineering, North Carolina State University, Raleigh, NC 27695
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Abstract

Conventional and self-aligned processes were developed for 250 °C inverse-staggered bottom gate a-Si:H thin film transistors (TFT's). Tri-layers of silicon nitride, amorphous silicon, and silicon nitride were continuously deposited in a plasma enhanced chemical vapor deposition system (PECVD). A self-alignment technique including back-side exposure and top nitride over etch was developed, which eliminates a masking step and the critical alignment of via opening used in typical TFT processing. Full self-aligned TFT's formed by selective n+ deposition were also fabricated successfully. Transistors show linear mobility ranging from 0.7 to 1.0 cm2/Vs, and current ON/OFF ratios greater than 106 were achieved for all TFT's.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 471: Symposium G – Flat Panel Display Materials III , 1997 , 179
Copyright
Copyright © Materials Research Society 1997

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References

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