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Characterisation of Dielectric Damage in MOS Capacitors by a New Current Transient Measurement Technique

Published online by Cambridge University Press:  10 February 2011

P. G. Tanner
Affiliation:
School of Microelectronics, Griffith University, Nathan, Queensland, Australia, 4111.
Sima Dimitrijev
Affiliation:
School of Microelectronics, Griffith University, Nathan, Queensland, Australia, 4111.
Y-T. Yeow
Affiliation:
Electrical Engineering Dept., University of Queensland, St. Lucia, Queensland, Aust., 4072.
H. B. Harrison
Affiliation:
School of Microelectronics, Griffith University, Nathan, Queensland, Australia, 4111.
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Abstract

With the requirement for reduced dielectric thickness and improved durability in silicon MOS devices, new growth techniques and material composition are constantly being developed. An important part of this development is the electrical characterisation of the dielectric material and in particular the properties of the dielectric-semiconductor interface.

This paper presents a study of damage caused to the dielectrics of MOS capacitors which have been subjected to either constant current stressing or RF plasma etching. The density and energy position of fast interface states and fixed oxide charges were measured using standard capacitance-voltage techniques. These results are then compared with a new current transient technique, which has been developed to measure slow interface states having a range of response times. This new technique steps the surface Fermi level through the silicon bandgap and the resulting current transients provide information on trap response times at each energy position. The response time can then be related to the tunneling distance from the trap to the bulk silicon. This technique has provided important information about the energies and response times of traps generated in damaged dielectrics, and should prove to be a useful tool for damage evaluation in the future.

Type
Research Article
Copyright
Copyright © Materials Research Society 1996

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