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Ultimately Low Schottky Barrier Height at NiSi/Si Junction by Sulfur Implantation after Silicidation for Aggressive Scaling of MOSFETs

Published online by Cambridge University Press:  31 January 2011

Yen-Chu Yang
Affiliation:
yenchuyang@gmail.com, Stanford University, Materials Science and Engineering, Stanford, California, United States
Yoshifumi Nishi
Affiliation:
yoshifumi.nishi@toshiba.co.jp, Toshiba Corporation, Advanced LSI Technology Laboratory, Yokohama, Japan
Atsuhiro Kinoshita
Affiliation:
atsuhiro.kinoshita@toshiba.co.jp, Toshiba Corporation, Advanced LSI Technology Laboratory, Yokohama, Japan
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Abstract

Parasitic resistance, particularly source/drain contact resistance becomes one of the most serious problems to extend MOSFET scaling recently. Nickel silicide (NiSi), with advantages of low resistivity and high scalability, has been chosen as the material for source/drain formation. However, its Schottky barrier height (SBH) of 0.65eV for electrons is so high that it would block electrons from tunneling, therefore becomes an obstacle to further reduce the contact resistance, which is necessary to achieve the future scaling. Among several solutions, high concentration impurity-segregation layers have been introduced at NiSi/Si interfaces to reduce SBH of MS-MOSFETs. Sulfur (S) has been considered to be an efficient material for the segregation-layer to reduce SBH owing to Fermi-level pinning effect. Previous studies have investigated segregation by implanting S before NiSi formation. Because of the high diffusivity of S in Si, S profile becomes broad during silicidation process, which leads to loss of S concentration at the interface. Moreover, S ions spread into the substrate and channel region generate deep impurity levels that induce junction leakage and off leakage, resulting in device performance degradation. In this paper, S implantation after Ni silicidation is proposed to suppress S diffusion because NiSi is expected to be an efficient barrier for S diffusion. In addition, NiSi/Si interface can serve as a potential energetic valley which may trap S during thermal treatment after implantation. In this work, S was implanted into NiSi/n-Si diodes at the energy of 10keV with dose of 5�1014 and 1015 cm-3 after NiSi is formed. The projection range of S in NiSi is about 6nm, while thickness of NiSi is 16nm. Some devices were annealed at 300C and 450C. The I-V characteristics show that SBH is sufficiently reduced as the annealing temperature becomes higher, and it reaches as low as 3.4meV for 450C annealing. SBH of 3.4meV is much lower than the previously reported value of 70meV for which S was implanted before silicidation. The SIMS analysis result also proves the S profile is much sharper than having S-implantation before Ni silicidation, which supports our hypothesis that S diffusion is suppressed through our process and avoid the loss of S concentration at the interface. Moreover, despite the worry that S-implantation might damage the NiSi/Si interface morphology, cross sectional TEM images show that the interfacial flatness is completely the same as that of non-implanted NiSi/Si, indicating that no degradation occurs by S implantation. In summary, S-implantation after NiSi formation, which provides ultimately low SBH at NiSi/Si interface, is a promising technique to realize ultra-low parasitic resistance source/drain for future LSI beyond 16nm generation.

Type
Research Article
Copyright
Copyright © Materials Research Society 2009

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References

1 Zhu, Shiyang, et al., “N-Type Schottky Barrier Source/Drain MOSFET Using Ytterbium Silicide”, IEEE Electron Device Letters, vol.25, no.8, pp.565567, 2004.Google Scholar
2 Calvet, L.E., Luebben, H., Reed, M.A., Wang, C. and Snyder, J.P., “Suppression of leakage current in Schottky barrier metal-oxide-semiconductor field-effect transistors”, J. Appl. Phys., 91, 757 (2002).Google Scholar
3 Lee, Rinus T.P., et al., “Novel Nickel-Alloy Silicides for Source/Drain Contact Resistance Reduction in N-Channel Multiple-Gate Transistors with Sub-35nm Gate Length”, IEDM Tech. Dig. 2006, p.851.Google Scholar
4 Nishi, Y., Tsuchiya, Y., Kinoshita, A., Yamauchi, T and Koga, J., “Interfacial Segregation of Metal at NiSi/Si Junction for Novel Dual Silicide Technology,” IEDM Tech. Dig. 2007, p.135.Google Scholar
5 Kinoshita, A., Tsuchiya, Y., Yagishita, A., Uchida, K. and Koga, J., “Solution for High-Performance Schottky-Source/Drain MOSFETs: Schottky Barrier Height Engineering with Dopant Segregation Technique”, 2004 Symp. VLSI Tech., p.168.Google Scholar
6 Yamauchi, T., Nishi, Y., Tsuchiya, Y., Kinoshita, A., Kog, J. and Kato, K., “Novel doping technology for a 1nm NiSi/Si junction with dipoles comforting Schottky (DCS) barrier,” IEDM Tech. Dig. 2007, p. 963.Google Scholar
7 Saiz-Pardo, R., Perez, R., Garcia-Vidal, F. J., Whittle, R., and Flores, F., Surf. Sci. 426, 26, 1999.Google Scholar
8 Ikeda, K., Yamashita, Y., Sugiyama, N., Taoka, N., and Takagi, S., “Modulation of NiGe/Ge Schottky barreir height by sulfur segregation during Ni germanidation,” Appl. Phys. Lett., 88, 152115, 2006 Google Scholar
9 Zhao, Q. T., Breuer, U., Rije, E, Lenk, St., and Mantl, S., “Tuning of NiSi/Si Schottky barrier heights by sulfur segregation during Ni silicidation,” Appl. Phys. Lett., 86, 062108, 2005.Google Scholar
10 Wong, H.-S., “Selenium Co-implantation and Segregation as a New Contact Technology for Nanoscale SOI N-FETs Featuring NiSi:C formed on Silicon-Carbon (Si:C) Source/Drain Stressors”, 2008 Symp. VLSI Tech. p.168.Google Scholar