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Threshold Voltage Optimization with Ion Shower Implantation for Polysilicon Thin-film Transistors

Published online by Cambridge University Press:  01 February 2011

B. D. Choi ,
D. C. Choi ,
C. Y. Im ,
K. H. Choi ,
C. H. Yu ,
R. Kakkad  and
H. K. Chung
B. D. Choi
Affiliation:
Advanced Technology Institute, Samsung SDI, Giheung, Yongin, Kyoungki, 442-391,S. Korea
D. C. Choi
Affiliation:
Advanced Technology Institute, Samsung SDI, Giheung, Yongin, Kyoungki, 442-391,S. Korea
C. Y. Im
Affiliation:
Advanced Technology Institute, Samsung SDI, Giheung, Yongin, Kyoungki, 442-391,S. Korea
K. H. Choi
Affiliation:
Advanced Technology Institute, Samsung SDI, Giheung, Yongin, Kyoungki, 442-391,S. Korea
C. H. Yu
Affiliation:
Advanced Technology Institute, Samsung SDI, Giheung, Yongin, Kyoungki, 442-391,S. Korea
R. Kakkad
Affiliation:
Advanced Technology Institute, Samsung SDI, Giheung, Yongin, Kyoungki, 442-391,S. Korea
H. K. Chung
Affiliation:
Advanced Technology Institute, Samsung SDI, Giheung, Yongin, Kyoungki, 442-391,S. Korea
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Abstract

In this paper, we present the results of ion shower implantation to adjust threshold voltages on ELC (excimer laser crystallized) poly silicon thin film transistors. We observed that the threshold voltages of poly Si TFT strongly depended on the shower implantation dose, not the shower implantation energy for the 500 Å-thick active silicon layer. The threshold voltages for the reference, dose 5×1011 cm-2, and 1×1012 cm-2 cases were 0.30V, 1.25V, and 2.04V, respectively. We conclude that the threshold voltage can be appropriately adjusted by tuning the dose of the counter doping shower implant and its DIBL can still be suppressed to within an acceptable level.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 862: Symposium A – Amorphous and Nanocrystalline Silicon Science and Technology–2005 , 2005 , A17.7
Copyright
Copyright © Materials Research Society 2005

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References

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