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Study and Optimization of Silicon-CVD Diamond Interface for SOD Applications

Published online by Cambridge University Press:  31 January 2011

Jean-Paul Mazellier
Affiliation:
jean-paul.mazellier@cea.fr, CEA, LETI, MINATEC, Innovative Devices Laboratory, Grenoble, France
Jean-Charles Arnault
Affiliation:
jean-charles.arnault@cea.fr, CEA, -LIST, Diamond Sensors Laboratory, Grenoble, France
Mathieu Lions
Affiliation:
m.liions@fakeemail.com, CEA, -LIST, Diamond Sensors Laboratory, Grenoble, France
François Andrieu
Affiliation:
F.ANDRIEU@FAKEMAIL.COM, CEA, LETI, MINATEC, Innovative Devices Laboratory, Grenoble, France
Robert Truche
Affiliation:
r.truche@fakemail.com, CEA, LETI, MINATEC, Innovative Devices Laboratory, Grenoble, France
Bernard Previtali
Affiliation:
prevatili@fakemail.com, CEA, LETI, MINATEC, Innovative Devices Laboratory, Grenoble, France
Samuel Saada
Affiliation:
saada@fakemail.com, CEA, -LIST, Diamond Sensors Laboratory, Grenoble, France
Philippe Bergonzo
Affiliation:
philippe.bergonzo@scholarone.net, CEA, LIST, Gif-sur-Yvette, France
Simon Deleonibus
Affiliation:
sdeleonibus@cea.fr, CEA-LETI, MINATEC,, 17 rue des Martyrs, Grenoble, 38054, France
Sorin Cristoloveanu
Affiliation:
Cristoloveanu@fakemail.com, IMEP-LAHC MINATEC, Grenoble, France
Olivier Faynot
Affiliation:
faynot@fakemail.com, CEA, LETI, MINATEC, Innovative Devices Laboratory, Grenoble, France
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Abstract

With respect to Silicon-on-Diamond approaches as an alternative to SOI where diamond is used as the buried dielectric, we have in recent works demonstrated the feasibility of a novel approaches where the CVD diamond layer is grown on silicon using Bias Enhanced Nucleation (BEN) over large area substrates, then smoothed and assembled to successfully enable the fabrication of first prototypes of silicon-on-diamond substrates. The key novelty to those SOD substrates were that only a very thin box dielectric diamond layer is used (typically from 150 to 500nm thick), as required by the current SOI technology. However we had also observed that the silicon-diamond interface quality to be sensitive to the nature of the nucleation interface. Thus the current contribution here studies the chemical nature of various capping materials used to solve the issue of electrical defects in case of direct silicon-diamond interface and at the same time to enable the whole system to benefit from the high thermal conductivity of diamond when compared to other standard electrical insulating materials.

Type
Research Article
Copyright
Copyright © Materials Research Society 2010

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References

[1] Edholm, B., Vestling, L., Bergh, M., Tiensuu, S. and Söderbärg, A., “Silicon-On-Diamond MOS-Transistors with Thermally Grown Gate Oxide” Proceedings IEEE International SOI Conference (1997)Google Scholar
[2] Widiez, J., Rabarot, M., Saada, S., Mazellier, J.-P., Dechamp, J., Delaye, V., Roussin, J.-C., Andrieu, F., Faynot, O., Deleonibus, S., Bergonzo, P., Clavelier, L., “Fabrication of Silicon-On-Diamond (SOD) Substrates by either Bonded and Etched Back SOI (BESOI) or the Smart-Cut Technology”. Solid-State Electronics to be published (2010)Google Scholar
[3] Mazellier, J.-P., Widiez, J., Andrieu, F., Lions, M., Saada, S., Hasegawa, M., Tsugawa, K., Brevard, L., Dechamp, J., Rabarot, M., Delaye, V., Cristoloveanu, S., Deleonibus, S., Bergonzo, P., Faynot, O., “Diamond integration for thermal management in thin Silicon MOSFETs”. Proceedings IEEE International SOI Conference (2009)Google Scholar
[4] Edholm, B., Olsson, J., Keskitalo, N. and Vestling, L., “Electrical investigation of the Silicon/Diamond Interface”. Microelectronic Engineering 36, p. 245248 (1997)Google Scholar
[5] Yugo, S., Kanai, T., Kimura, T. and Muto, T., “Generation of diamond nuclei by electric field in plasma chemical vapor deposition”. Applied Physics Letters 58, p. 10361038(1991)Google Scholar
[6] Saada, S., Arnault, J.-C., Rocha, L. and Bergonzo, P., “Synthesis of Sub- Micron Diamond Films on Si(100) for Thermal Applications by BEN-MPCVD”. Material Research Society Symposium 956 (2007)Google Scholar
[7] Lions, M., Saada, S., Mazellier, J.-P., Andrieu, F., Faynot, O., Bergonzo, P., “Ultra-thin nanocrystalline diamond films (<100 nm) with high electrical resistivity”. Physica Status Solidi (RRL) 3, p. 205207 (2009)Google Scholar
[8] Seah, M.P., “Post-1989 calibration energies for X-ray photoelectron spectrometers and the 1990 Josephson constant”. Surface and Interface Analysis 14, p. 488 (1989).Google Scholar
[9] Lee, S.-M. and Cahill, D.G., “Heat transport in thin dielectric films”. Journal of Applied Physics 81, p. 25902595 (1997)Google Scholar
[10] Rabarot, M., Widiez, J., Saada, S., Mazellier, J.-P., Roussin, J.-C., Dechamp, J., Bergonzo, P., Andrieu, F., Faynot, O., Deleonibus, S., and Clavelier, L., “Silicon-on-Diamond layer integration by wafer bonding technology”. Diamond and Related Materials to be published (2010)Google Scholar
[11] Saada, S., Arnault, J.C., Tranchant, N., Bonnauron, M., Bergonzo, P., “Study of the CVD process sequences for an improved control of the Bias Enhanced Nucleation step on silicon”. Physica Status Solidi (a) 204, p. 28542859 (2007).Google Scholar
[12] Jauhiainen, A., Bengtsson, S. and Engström, O., “Steady-state and transient current transport in undoped polycrystalline diamond films”. Journal of Applied Physics 82, p. 49664976 (1997).Google Scholar