Hostname: page-component-77c89778f8-rkxrd Total loading time: 0 Render date: 2024-07-16T10:22:27.205Z Has data issue: false hasContentIssue false
  • English
  • Français

Self-aligned Amorphous Silicon Thin Film Transistors with Mobility above 1 cm2V−1s−1 fabricated at 300°C on Clear Plastic Substrates

Published online by Cambridge University Press:  01 February 2011

Kunigunde H Cherenack ,
Alex Z Kattamis ,
Bahman Hekmatshoar ,
James C Sturm  and
Sigurd Wagner
Kunigunde H Cherenack
Affiliation:
kcherena@princeton.edu, Princeton University, Electrical Engineering, B405 E-Quad, Princeton University, Olden Street, Princeton, NJ, 08540, United States
Alex Z Kattamis
Affiliation:
kattamis@princeton.edu, Princeton University, Princeton, NJ, 08540, United States
Bahman Hekmatshoar
Affiliation:
hekmat@princeton.edu, Princeton University, Princeton, NJ, 08540, United States
James C Sturm
Affiliation:
sturm@princeton.edu, Princeton University, Princeton, NJ, 08540, United States
Sigurd Wagner
Affiliation:
wagner@princeton.edu, Princeton University, Princeton, NJ, 08540, United States
Get access

Abstract

We have developed a fabrication process for amorphous-silicon thin-film transistors (a-Si:H TFTs) on free-standing clear plastic substrates at temperatures up to 300°C. The 300°C fabrication process is made possible by using a unique clear plastic substrate that has a very low coefficient of thermal expansion (CTE < 10ppm/°C) and a glass transition temperature higher than 300°C. Our TFTs have a conventional inverted-staggered gate back-channel passivated geometry, which we designed to achieve two goals: accurate overlay alignment and a high effective mobility. A requirement that becomes particularly difficult to meet in the making of TFT backplanes on plastic foil at 300°C is minimizing overlay misalignment. Even though we use a substrate that has a relatively low CTE, accurately aligning the TFTs on the free-standing, 70-micrometer thick substrate is challenging. To deal with this immediate challenge, and to continue developing processes for free-standing web substrates, we are introducing techniques for self-alignment to our TFT fabrication process. We have self-aligned the channel to the gate by exposing through the clear plastic substrate. To raise the effective mobility of our TFTs we reduced the series resistance by decreasing the thickness of the amorphous silicon layer between the source-drain contacts and the accumulation layer in the channel. The back-channel passivated structure allows us to decrease the thickness of the a-Si:H active layer down to around 20nm. These changes have enabled us to raise the effective field effect mobility on clear plastic to values above 1 cm2V−1s−1

Keywords

thin filmplasma-enhanced CVD (PECVD) (deposition)lithography (removal)
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 1066: Symposium A – Amorphous and Polycrystalline Thin-Film Silicon Science and Technology—2008 , 2008 , 1066-A20-03
Copyright
Copyright © Materials Research Society 2008

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Kwon, Jang Yeon, Kim, Do Young, Cho, Hans S., Park, Kyung Bae, Jung, Ji Sim, Kim, Jong Man, Park, Young Soo, and Noguchi, Takashi, “Low Temperature Poly-Si Thin Film Transistor on Plastic Substrates”, IEICE Trans. Electron., vol. E88.C, no. 4, pp. 667–671 (2005).Google Scholar
2. Gosain, D.P., Noguchi, T., and Usui, S., “High mobility thin film transistors fabricated on plastic substrates at a processing temperature of 110°C,” Jpn. J. Appl. Phys. 2, Lett., vol.39, no.3A/B, pp.L179. L181 ( March 2000).Google Scholar
3. Long, K., Kattamis, A. Z., Cheng, I.C., Gleskova, H., Wagner, S., Sturm, J. C., Stevenson, M., Yu, G., and O'Regan, M., “Active-Matrix Amorphous-Silicon TFTs Arrays at 180‘deg;C on Clear Plastic and Glass Substrates for Organic Light-Emitting Displays”, IEEE Trans. Elec. Dev., vol. 53, no. 8, pp. 1789–1796 (August 2006).Google Scholar
4. Sarma, K. R., a-Si TFT OLED Fabricated on Low-Temperature Flexible Plastic Substrate., Mat. Res. Soc. Symp. Proc., Vol. 814, pp I13.1.1–12 (2004).Google Scholar
5. MacDonald, William A., “Engineered Films for Display Technologies”, J. Mater. Chem., vol. 14, pp 4–10 (2004)Google Scholar
6. Blaauw, C., “Preparation and Characterization of Plasma-Deposited Silicon Nitride”, J. Electrochem. Soc., vol. 131, pp. 1114–1118 (1984).Google Scholar
7. Wagner, S., Gleskova, H., Sturm, J. C., and Suo, Z., “Novel processing technology for macroelectronics,” in Technology and Application of Amorphous Silicon, Street, R. A., editor Springer, Berlin, pp.222–251 (2000).Google Scholar
8. McArthur, C.R., “Optimization of 75°C Amorphous Silicon Nitride for TFTs on Plastics”, MASc thesis, University of Waterloo (2003).Google Scholar
9. Wehrspohn, R. B., Deane, S. C., and French, I. D. et al. , “Relative importance of the Si-Si bond and Si.H bond for the stability of amorphous silicon thin film transistors,” J. Appl. Phys., vol. 87, issue 1, pp. 144. 154 (January 2000).Google Scholar
10. Yang, C.S., Smith, L. L., Arthur, C. B., and Parsons, G. N., “Stability of low-temperature amorphous silicon thin film transistors formed on glass and transparent plastic substrates,” J. Vac. Sci. Technol. B, vol. 18, no. 2, pp. 683–689 (March/April 2000).Google Scholar
11. Kaneko, Y., Sasano, A., and Tsukada, T., “Characterization of instability in amorphous silicon thin-film transistors,” J. Appl. Phys., vol. 69, pp. 7301–7305 (1991).Google Scholar
12. Long, K., Kattamis, A.Z., Cheng, I.C., Gleskova, H., Wagner, S., Sturm, J.C., “Stability of amorphous-silicon TFTs deposited on clear plastic substrates at 250°C to 280°C,” IEEE Elec. Dev. Lett., vol.27, no.2, pp. 111–113 (Feb. 2006).Google Scholar
13. Long, Ke, “Towards Flexible Full-Color Active Matrix Organic Light-Emitting Displays: Dry Dye Printing For OLED Integration and 2800C Amorphous-Silicon Thin-Film Transistors on Clear Plastic Substrates”, Ph.D thesis, Princeton University (2006).Google Scholar
14. Kattamis, A. Z., Cheng, I. Chun, Long, Ke, Hekmatshoar, Bahman, Cherenack, Kunigunde, Wagner, Sigurd, Sturm, James C., Venugopal, Sameer, Loy, Douglas E., Rourke, Shawn M. O., and Allee, David R.. “Amorphous Silicon Thin Film Transistor Backplanes Deposited at 200°C on Clear Plastic”, J. Display Technology, vol. 3, no. 3, pp. 304–308 (September 2007).Google Scholar
15. Cherenack, Kunigunde H., Kattamis, Alex Z., Hekmatshoar, Bahman, Sturm, James C., and Wagner, Sigurd, “Amorphous-Silicon Thin-Film Transistors Fabricated at 300°C on a Free-Standing Foil Substrate of Clear Plastic,” IEEE Electron Device Lett., vol. 28, no. 11, pp.1004–1006 (November 2007).Google Scholar
16. Hekmatshoar, Bahman, Kattamis, Alex Z., Cherenack, Kunigunde H., Ke Long, Jian-Zhang Chen, Wagner, Sigurd, Sturm, James C., Rajan, Kamala, and Hack, Michael, “Reliability of Active-Matrix Organic Light-Emitting-Diode Arrays With Amorphous Silicon Thin-Film Transistor Backplanes on Clear Plastic”, IEEE Electron Device Lett., vol. 29, pp. 63–66 (2008).Google Scholar
17. Cheng, I-Chun, Kattamis, Alex, Long, Ke, Sturm, Jim, Wagner, Sigurd, “Stress control for overlay registration in a-Si:H TFTs on flexible organic-polymer-foil substrates”, Journal of the SID, vol. 13, no. 7, pp. 563–568 (2005).Google Scholar
18. Gleskova, H., Cheng, I. C., Wagner, S., and Suo, Z. G., “Thermomechanical criteria for overlay alignment in flexible thin-film electronic circuits,” Applied Physics Lett., vol. 88, pp. 011905–1-3 (2006).Google Scholar
19. Lemmi, F., Chung, W., Lin, S., Smith, P. M., Sasagawa, T., Drews, B. C., Hua, A., Stern, J. R., and Chen, J. Y., “High-performance TFTs fabricated on plastic substrates,” IEEE Electron Device Lett., vol. 25, no. 5, pp. 486–488 (2004)Google Scholar
20. Kattamis, A., Cheng, I.C., Long, K., Sturm, J. C., and Wagner, S., “Dimensionally stable processing of a-Si TFTs on polymer foils,” in Proc. 47th Ann. TMS Electron. Mater. Conf., p. 73 (2005)Google Scholar
21. Wong, W. S., Paul, K. E., and Street, R. A., “Digital-lithographic processing for thin-film transistor array fabrication,” J. Non-Cryst. Sol., vol. 338-340, pp. 710–714 (2004)Google Scholar
22. Cabarrocas, P. Rocai, Brenot, R., Bulkin, P., Vanderhaghen, R., Drevillon, B., and French, I., “Stable microcrystalline silicon thin-film transistors produced by the layer-by-layer technique,” J. Appl. Phys. 86, 7079–7082 (1999)Google Scholar
23. Cheng, I. Chun, Kattamis, Alex Z., Long, Ke, Sturm, James C., and Wagner, Sigurd, “Self-Aligned Amorphous-Silicon TFTs on Clear Plastic Substrates”, IEEE Trans. Elec. Dev, vol. 27, no. 3 (March 2006)Google Scholar