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Impact of the High-Temperature Process Steps on the HfAlO Interpoly Dielectric Stacks for Nonvolatile Memory Applications

Published online by Cambridge University Press:  01 February 2011

Daniel Ruiz Aguado
Affiliation:
aguado@imec.be, IMEC, PT/Memory, Kapeldreef 75, Leuven, 3001, Belgium, +3216281211, +3216229400
Bogdan Govoreanu
Affiliation:
govorean@imec.be, IMEC, Kapeldreef 75, Leuven, 3001, Belgium
Paola Favia
Affiliation:
faviap@imec.be, IMEC, Kapeldreef 75, Leuven, 3001, Belgium
Kristin De Meyer
Affiliation:
demeyer@imec.be, IMEC, Kapeldreef 75, Leuven, 3001, Belgium
Jan Van Houdt
Affiliation:
vanhoudt@imec.be, IMEC, Kapeldreef 75, Leuven, 3001, Belgium
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Abstract

This work reports on the performance of different Hafmiun aluminate (HfAlOx)-based interpoly dielectrics (IPD) for future sub-45nm nonvolatile memory (NVM) technologies. The impact of the thermal budget during the fabrication process is studied. The good retention and large operating window shown by this material, can be compromised by a high temperature activation anneal (AA) after the gate deposition. The AA step may induce phase segregation of the HfAlOx and outdiffusion of the Hf (Al) towards the floating gate/IPD and IPD/gate interfaces and subsequent formation of Hf (Al) silicates. These findings are supported by the low field leakage analysis, which shows large device to device dispersions. However, the effect of the spike anneal can be minimized if the HfAlOx layer is crystallized prior to the AA. Devices with polysilicon or TiN gate are compared in terms of memory performance and reliability.

Type
Research Article
Copyright
Copyright © Materials Research Society 2008

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References

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