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Doping of Sub-50nm SOI Layers

Published online by Cambridge University Press:  01 February 2011

Bartek J. Pawlak
Affiliation:, NXP Semiconductors, Process Technology, Kapeldreef 75, Leuven,, B-3001, Belgium, 32-16-281-060, 32-16-285-788
Ray Duffy
Affiliation:, NXP-TSMC Research Center, Kapeldreef 75, Leuven, 3001, Belgium
Mark van Dal
Affiliation:, NXP-TSMC Research Center, Kapeldreef 75, Leuven, 3001, Belgium
Frans Voogt
Affiliation:, NXP Semiconductors, Nijmegen, N/A, Netherlands
Robbert Weemaes
Affiliation:, Philips, Eindhoven, N/A, Netherlands
Fred Roozeboom
Affiliation:, NXP Semiconductors, Eindhoven, N/A, Netherlands
Peer Zalm
Affiliation:, Philips, Eindhoven, N/A, Netherlands
Nick Bennett
Affiliation:, University of Newcastle, Newcastle, N/A, United Kingdom
Nick Cowern
Affiliation:, University of Newcastle, Newcastle, N/A, United Kingdom
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Doping of thin body Si becomes very essential topic due to increasing interest of forming source/drain regions in fully depleted planar silicon-on-isolator (SOI) devices or vertical Fin field-effect-transistors (FinFETs). To diminish the role of the short-channel-control-effect (SCE) the Si layers thicknesses target the 10 nm range. In this paper many aspects of thin Si body doping are discussed: dopant retention, implantation-related amorphization, thin body recrystallization, sheet resistance (Rs) and carrier mobility in crystalline or amorphized material, impact of the annealing ambient on Rs for various SOI thicknesses. The complexity of 3D geometry for vertical Fin and the vicinity of the extended surface have an impact on doping strategies that are significantly different than for planar bulk devices.

Research Article
Copyright © Materials Research Society 2008

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