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Application of Porous Silicon to Bulk Silicon Micromachining

Published online by Cambridge University Press:  10 February 2011

G. Kaltsas  and
A. G. Nassiopoulos
G. Kaltsas
Affiliation:
Institute of Microelectronics, NCSR Demokritos, P.O. Box 60228, 15310 Aghia Paraskevi Attikis, Athens, GREECE
A. G. Nassiopoulos
Affiliation:
Institute of Microelectronics, NCSR Demokritos, P.O. Box 60228, 15310 Aghia Paraskevi Attikis, Athens, GREECE
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Abstract

A fully C-MOS compatible process for bulk silicon micromachining using porous silicon technology and front-side lithography is developed. The process is based on the use of porous silicon as a sacrificial layer for the fabrication of deep cavities into monocrystalline silicon, so as to avoid back side lithography. Cavities as deep as several hundreds of micrometers are produced with very smooth surface and sidewalls. The process is used to produce : a) suspended monocrystalline silicon membranes, b) free standing polysilicon membranes in the form of bridges or cantilevers with lateral dimensions from a few μms to several hundreds of μms. Important applications to silicon integrated devices as sensors, actuators, detectors etc., are foreseen.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 459: Symposium Y – Materials for Smart Systems II , 1996 , 249
Copyright
Copyright © Materials Research Society 1997

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References

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