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Neuromorphic-based Boolean and reversible logic circuits from organic electrochemical transistors

Published online by Cambridge University Press:  10 August 2020

Jake C. Perez
Affiliation:
University of Colorado Boulder, USA; jake.perez@colorado.edu
Sean E. Shaheen
Affiliation:
University of Colorado Boulder, USA; sean.shaheen@colorado.edu
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Abstract

We show the design and simulation of organic neuromorphic circuits in a hybrid-computation approach that emulates Boolean and reversible logic gates based on multigate organic electrochemical transistors (OECTs). The organic neuromorphic circuits consist of input, hidden, and output layers that can carry out Boolean operations, including the Exclusive OR (XOR) function, with five or less OECTs. The multigate functionality of OECTs is harnessed to perform the summation function of the neurons. Connection weights of the networks are defined in an unconventional way that depends on the value of the drain-source current of the outputting neuron, which changes according to the input values of the circuit. The Boolean circuits can be cascaded together to build higher level circuits and are demonstrated to form a full adder circuit and the Double Feynman and Toffoli reversible logic gates. Using realistic experimental parameters, the energy per computation is estimated to be ~2.3 nJ for circuit designs with a bias voltage of 0.5 V, with ~230 fJ or less being achievable for lower bias voltages.

Type
Organic Semiconductors for Brain-Inspired Computing
Copyright
Copyright © Materials Research Society 2020

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References

Rivnay, J., Inal, S., Salleo, A., Owens, R.M., Berggren, M., Malliaras, G.G., Nat. Rev. Mater. 3, 17086 (2018).CrossRefGoogle Scholar
Friedlein, J.T., McLeod, R.R., Rivnay, J., Org. Electron. 63, 398 (2018).CrossRefGoogle Scholar
Van De Burgt, Y., Melianas, A., Keene, S.T., Malliaras, G., Salleo, A., Nat. Electron. 1, 386 (2018).CrossRefGoogle Scholar
Pecqueur, S., Vuillaume, D., Alibart, F., J. Appl. Phys. 124, 151902 (2018).CrossRefGoogle Scholar
Gkoupidenis, P., Schaefer, N., Garlan, B., Malliaras, G. G., Adv. Mater. 27, 7176 (2015).CrossRefGoogle Scholar
Gkoupidenis, P., Schaefer, N., Strakosas, X., Fairfield, J.A., Malliaras, G.G., Appl. Phys. Lett. 107, 263302 (2015).CrossRefGoogle Scholar
Gerasimov, J.Y., Gabrielsson, R., Forchheimer, R., Stavrinidou, E., Simon, D.T., Berggren, M., Fabiano, S., Adv. Sci. 6, 1801339 (2019).CrossRefGoogle Scholar
Tybrandt, K., Forchheimer, R., Berggren, M., Nat. Commun. 3, 871 (2012).CrossRefGoogle Scholar
Ling, H., Koutsouras, D.A., Kazemzadeh, S., Van De Burgt, Y., Yan, F., Gkoupidenis, P., Appl. Phys. Rev. 7, 011307 (2020).CrossRefGoogle Scholar
Qian, C., an Kong, L., Yang, J., Gao, Y., Sun, J., Appl. Phys. Lett. 110, 083302 (2017).CrossRefGoogle Scholar
Gkoupidenis, P., Koutsouras, D.A., Malliaras, G.G., Nat. Commun. 8, 15448 (2017).CrossRefGoogle Scholar
Gkoupidenis, P., Rezaei-Mazinani, S., Proctor, C.M., Ismailova, E., Malliaras, G.G., AIP Adv. 6, 111307 (2016).CrossRefGoogle Scholar
Taha, S.M.R., Reversible Logic Synthesis Methodologies with Application to Quantum Computing (Springer International Publishing, Cham, Switzerland, 2015), vol. 37.Google Scholar
Nawrocki, R.A., Voyles, R.M., Shaheen, S.E., IEEE Trans. Electron Devices 61, 3513 (2014).CrossRefGoogle Scholar
Nawrocki, R.A., Galiger, E.M., Ostrowski, D.P., Bailey, B.A., Jiang, X., Voyles, R.M., Kopidakis, N., Olson, D.C., Shaheen, S.E., Org. Electron. 15, 1791 (2014).CrossRefGoogle Scholar
Emelyanov, A.V., Lapkin, D.A., Demin, V.A., Erokhin, V.V., Battistoni, S., Baldi, G., Dimonte, A., Korovin, A.N., Iannotta, S., Kashkarov, P.K., Kovalchuk, M.V., AIP Adv. 6, 111301 (2016).CrossRefGoogle Scholar
Bernards, D.A., Malliaras, G.G., Adv. Funct. Mater. 17, 3538 (2007).CrossRefGoogle Scholar
Brown, S., Vranesic, Z., Fundamentals of Digital Logic with Verilog Design, 3rd ed., McGraw-Hill Education. New York. (2014).Google Scholar
Friedlein, J.T., Donahue, M.J., Shaheen, S.E., Malliaras, G.G., McLeod, R.R., Adv. Mater. 28, 8398 (2016).CrossRefGoogle Scholar
Bennett, C.H., IBM J. Res. Dev. 17, 525 (1973).CrossRefGoogle Scholar
Fredkin, E., Toffoli, T., Int. J. Theor. Phys. 21, 219 (1982).CrossRefGoogle Scholar
Barenco, A., Bennett, C.H., Cleve, R., Divincenzo, D.P., Margolus, N., Shor, P., Sleator, T., Smolin, J.A., Weinfurter, H., Phys. Rev. A. 52, 3457 (1995).CrossRefGoogle Scholar
Biswas, P.K., Bahar, A.N., Habib, M.A., Abdullah-Al-Shafi, M., Nanosci. Nanotechnol. 7, 27 (2017).Google Scholar
von Neumann, J., Theory of Self-Reproducing Automata, 1st ed. (University of Illinois Press, 1966).Google Scholar
Landauer, R., IBM J. Res. Dev. 5, 183 (2010).CrossRefGoogle Scholar
Wolpert, D.H., J. Phys. A Math. Theor. 52, 193001 (2019).CrossRefGoogle Scholar
Lukac, M., Kameyama, M., Perkowski, M., Kerntopf, P., Moraga, C., Adamatzky, A., Ed. (Springer International Publishing, Cham, Switzerland, 2017), pp. 475493.CrossRefGoogle Scholar
Patel, K.N., Hayes, J.P., Markov, I.L., IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23, 1220 (2004).CrossRefGoogle Scholar
DiVincenzo, D.P., Proc. R. Soc. A Math. Phys. Eng. Sci. 454, 261 (1998).Google Scholar
Miszczak, J.A., Synth. Lect. Quantum Comput. 4, 1 (2012).CrossRefGoogle Scholar
Saravanan, P., P. Kalpana, J. Eng. Sci. Technol. 10, 1275 (2015).Google Scholar
D'Angelo, P., Marasso, S.L., Verna, A., Ballesio, A., Parmeggiani, M., Sanginario, A., Tarabella, G., Demarchi, D., Pirri, C.F., Cocuzza, M., Iannotta, S., Small 15, 1902332 (2019).CrossRefGoogle Scholar
Friedlein, J.T., Rivnay, J., Dunlap, D.H., McCulloch, I., Shaheen, S.E., McLeod, R.R., Malliaras, G.G., Appl. Phys. Lett. 111, 23301 (2017).CrossRefGoogle Scholar